I'm reading this book 3 easy pieces by remzi. In chapter 18 paging introduction in the first paragraph it is written
(real address spaces are much bigger, of course,
commonly 32 bits and thus 4-GB of address space, or even 64 bits)
Now if 1 byte is 8 bits, shouldn't 32 bits be 32/8 4 bytes space? I have seen the math for getting the answer as 4GB
2^10 = 1KB
2^10 = 1MB
2^10 = 1GB
But then this is assuming 2^1 = 1B, But isn't this simply wrong?
What am I missing? What does my answer (4Bytes) represent here?
This question is related How many bits are needed to address this much memory?
But doesn't address why my math is incorrect. (OP there also has the exact same confusion).
Lets say that I change the word size to 64MB (wild I know). Then number of words is 1. According to the answers, number of bits would be 2^0 = 1, 0 bits? Then where and when do we use the fact that 1 byte = 8 bits?
Any help would be appreciated.
Today, RAM is byte addressable. Each address put on the address bus returns 1 byte. If you have 32 bits, the amount of different addresses that you can come up with is 2^32 = 4,294,967,296. Since you can have that much different addresses, then you can address that much bytes. In terms of bytes, this amount of bytes is called 4 GB.
I'm just checking to make sure I have a proper understanding of how memory access works.
Say I have a word-addressable memory system with 64-bit words.
How much memory could be accessed using a 32-bit address size?
A 64 bit word is 8 bytes, so we're dealing with an 8 byte word.
An 8 byte word can hold up to 2^8 (256).
Given that we have a 32 bit address, we have 2^32, but since each word is taking up 256 of those, (2^32)/256 = 1677216 bytes.
To put that into metric terms, we have 2^24 = (2^4) * (2^20) = 16 Mb.
Is this the proper way of doing this?
A 32 bit address provides 4,294,967,296 possible addresses. If the smallest addressable element is a 64 bit == 8 byte word (versus a byte), then the total amount of addressable space would be 4,294,967,296 x 8 = 34,359,738,368 bytes= 34GB.
As for the capacity of an 8 byte word, it's 8 bytes, not 2^8 = 256 bytes.
Note some old computers did have a basic addressing system that only addressed words. Byte accessing required a byte index or offset from a word based address. I don't think any current computers use such a scheme.
You are taking 32 bit address which means 2^32 bits can be addressed but if you want how many bytes can be address then just divide it like 2^32/8=2^29 because 1 byte have 8 bit
and if you want how many words can be addressed then 2^29/8 because 1 word contains 8 bytes so 2^26 words can be addressed.
And since one word is 8 byte so we can address (2^26)*8 bytes.
Hope it might help!
Paging / Virtual Memory Translation
Say we have an address space of 64 bytes, which equals 512 bits.
With 16 byte pages, there are 4 pages in total within our address space. Each page has 128 bits available.
My textbook says because the virtual address
space of the process is 64 bytes, we need 6 bits total for our virtual address.
Question 1: Why is the virtual address 6 bits? How do they come up with this number?
Question 2: And why does it split it into 16 byte pages? It could have split them into 8, 8 byte chunks?
Why is the virtual address 6 bits? How do they come up with this number?
64 numbers require 6 bits to address
And why does it split it into 16 byte pages? It could have split them into 8, 8 byte chunks?
Correct. It is a decision
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The address bus of the 8086 is 20 bit wide. That means it can address 1048576 different addresses in RAM. Since the max. memory the 8086 could handle was 1 MiB, one single memory cell can store 1 byte.
So a random logical address like 0xffff0 has a "storage" of 8 bits or 1 byte.
A modern Core i7 has an adress bus of 36 Bit, meaning he can address 68719476736 different addresses. With one byte per logical address he can handle 68719476736 Byte or 64 GiB which is exactly the max. memory an Core i7 can handle.
Is that explanation correct, I think so right?
So since 30 years the max. storage of a logical memory address is exactly 1 Byte.
The wrong assumption is "max storage". No, the smallest directly addressable unit is 1 byte, and addressing goes in 1-byte increments, but there are commands that work on 8, 16, 32 and 64 bits, encompassing blocks of 1, 2, 4 and 8 bytes.
So while you can still read a single byte like in the times of the old, you can instead operate on a 64-bit word with one command, and using the 64-bit commands family operate on the same address space but modifying addresses/pointers in increments of 8, not 1 as was with single bytes.
So, while normally yes, each one physical address precisely corresponds to storage of 8 bits, you can instead use the address space as "sparse" where only divides of 8 are valid addresses, and then use each of them as a 64-bit storage location, exactly as if each valid address was corresponding to 64 bits of storage.
First: you seem to be stating opinions. This is not a forum.
Second, I think you are wrong on the logic and the facts.
facts: i7 can only handle 24Gb, not 64Gb (see What does the “Max Memory Size” on the new Intel Core i3 / i5 / i7 CPU's mean? and the i7 datasheet)
logic: The bus size need not directly affect addressing/addressable memory (though I suspect it usually does/did).
Quote from http://en.wikipedia.org/wiki/Intel_8088:
The Intel 8088 microprocessor was a variant of the Intel 8086 and was introduced on July 1, 1979. It had an 8-bit external data bus instead of the 16-bit bus of the 8086. The 16-bit registers and the one megabyte address range were unchanged, however. The original IBM PC was based on the 8088.
Just reading some notes in a purdue lecture about OSs, and it says:
A program sees memory as an array of
bytes that goes from address 0 to 2^32-1 (0 to
4GB-1)
Why 4 GB?
Because 32 bits are able to represent numbers up to 232 − 1 = 4294967295 = 4 GiB − 1 and therefore address up to 232 individual bytes which would be 4 GiB then.
There are ways to circumvent that, though. For example using PAE even a 32-bit operating system can support more memory. Historically this has most commonly been used on servers, though. Also, the non-server Windows SKUs don't support it. By now all that is moot, though, given that 64-bit CPUs, OSes and driver support are commonplace.
Because each byte of memory has to have an address. In a 32-bit operating system, an address is 32 bits long; thus, there are 2^32 possible addresses, which means there are 2^32 bytes = 4 GB.
If you have a 4-bit system, this means the address for each byte is 4 binary digits, the probability of all your address will range from 0000 through 1111 which is 2^4 = 16 (2 because there is either 0 or 1), with four bits it's possible to create 16 different values of zeros and ones, If you have 16 different addr. each represent a byte then you can have a max of 16 bytes
4-bit system will look like this:
For a 32-bit system, your max is 2^32 = 4294967292 bytes
Everybody is saying 2^32 = 4GiB, which is right. Just in case, here is how we got there:
A 32-bit machine uses 32 bits to address memory. Each bit has a value of 0 or 1. If you have 1 bit, you have two possible addresses: 0 or 1.
A two-bit system ( pun aside ) has four possible address: 00 =0, 01=1, 10=2, 11=3. 2^2=4.
Three bits have 8 possble addresses: 000=0, 001=1, 010=2, 011=3, 100=4, 101=5, 110=6, and 111=7.
Each bit doubles the potential address space, which is why 2^n tells you how many addresses you use for a given number of bits. 2^1 = 2, 2^2 = 2*2 = 4, 2^3 = 2*2*2 = 8, etc.
By the time you get to 32 bits, you are at 4GiB.
4 GB = 2^32 bytes.
2 ^ 32 = 4 * 1024 * 1024 * 1024
That, in bytes, is the definition of 4 GB. In other words a 32-bit register as a memory pointer can address 4 GB of memory and no more.
Actually, it's not as simple as 2^32 = 4294967296 bytes. You see in x86 protected mode, with paging enabled (that is, what you get when you use any modern OS), you don't address memory locations directly, even though the paging translation mechanism is transparent for client applications.
Of a logical 32 bit memory address, when using 4K pages:
bits 22-31 refer to a page directory
bits 12-21 refer to a page table
bits 11-0 refer to an offset in the 4096 byte page
As you can see, you have 2^10 (1024) page directories, in each page directory, you have 2^10 page tables and each page is 2^12 (4096) bytes long, hence 2^32 = 4294967296 bytes. The width of the memory bus is conveniently the same as the word length of the CPU but it's not necessary to be like this at all. In fact, more modern x86 CPUs support PAE which enables addressing more than 4GB (or GiB) even in 32-bit mode.
32bits can represent numbers 0..2^32 = 0..4,294,967,296
32bits can address up to 2^32Bytes (assuming Byte-size blocks)
2^32Bytes is the max size
2^32B = 4,194,304KiB = 4,194MiB = 4GiB
Because is the amount of different memory addresses (in Bytes) that can be stored in a Word.
But, in fact, that's not always true (in most of cases it isn't), the OS can handle more physical memory than that (with PAE) and the applications can use less than 4GB of virtual memory (because part of that virtual memory is mapped to the OS, 1GB in Linux and 2GB in Windows, for example).
Another scenario where that doesn't apply is if the memory was addressed by Words instead of Bytes, then the total memory addressable would be 16GB, for example.
A CPU with 32 bit registers will need the operating system to calculate everything in chunks of 32 bits. It's a hardware requirement to which the OS must conform. Similarly, CPUs with 64 bit registers will need an operating system that reads and writes data from the RAM in chunks of 64 bits. (Every time you read data from memory, you need to read it into one of those registers - be it 32 bit, or 64 bit, or 16 bit, etc.)
A 32 bit register can store 2^32 different RAM addresses.
Each RAM address corresponds to a byte (8 bits) in modern RAMs. (The 4 GB argument is true only for those RAMs that have addresses for every byte.)
=> 2^32 = 4,294,967,296 addresses, → that corresponds to 4,294,967,296 bytes.
Now, 1 KB = 2^10 bytes or 1024 bytes (in the binary system)
Therefore, 4,294,967,296 bytes / 1024 = 4,194,304 KB
4,194,304 KB / 1024 = 4,096 MB
4,096 MB / 1024 = 4 GB
Mainly due to 32bit OS chosing to support only 2^32-1 addresses.
If the CPU has more than 32 address lines on the FSB, then the 32bit OS can choose to use a paging mechanism to access more than 4GiB. (For example Windows 2000 Advanced Server/Data Center editions on PAE supported Intel/AMD chips)
4 GB = 2^32 bytes.
But remember its max 4gb allocated by a 32 bit OS. In reality, the OS will see less e.g. after VRAM allocation.
As previously stated by other users, 32-bit Windows OSes use 32-bit words to store memory addresses.
Actually, most 32-bit chips these days use 36-bit addressing, using Intel's Physical Address Extension (PAE) model. Some operating systems support this directly (Linux, for example).
As Raymond Chen points out, in Windows a 32-bit application can allocate more than 4GB of memory, and you don't need 64-bit Windows to do it. Or even PAE.
For that matter, 64-bit chips don't support the entire 64-bit memory space. I believe they are currently limited to 42-bit space... the 36-bit space that PAE uses, plus the top 8-bit addresses,