Paging / Virtual Memory Translation
Say we have an address space of 64 bytes, which equals 512 bits.
With 16 byte pages, there are 4 pages in total within our address space. Each page has 128 bits available.
My textbook says because the virtual address
space of the process is 64 bytes, we need 6 bits total for our virtual address.
Question 1: Why is the virtual address 6 bits? How do they come up with this number?
Question 2: And why does it split it into 16 byte pages? It could have split them into 8, 8 byte chunks?
Why is the virtual address 6 bits? How do they come up with this number?
64 numbers require 6 bits to address
And why does it split it into 16 byte pages? It could have split them into 8, 8 byte chunks?
Correct. It is a decision
Related
I'm reading this book 3 easy pieces by remzi. In chapter 18 paging introduction in the first paragraph it is written
(real address spaces are much bigger, of course,
commonly 32 bits and thus 4-GB of address space, or even 64 bits)
Now if 1 byte is 8 bits, shouldn't 32 bits be 32/8 4 bytes space? I have seen the math for getting the answer as 4GB
2^10 = 1KB
2^10 = 1MB
2^10 = 1GB
But then this is assuming 2^1 = 1B, But isn't this simply wrong?
What am I missing? What does my answer (4Bytes) represent here?
This question is related How many bits are needed to address this much memory?
But doesn't address why my math is incorrect. (OP there also has the exact same confusion).
Lets say that I change the word size to 64MB (wild I know). Then number of words is 1. According to the answers, number of bits would be 2^0 = 1, 0 bits? Then where and when do we use the fact that 1 byte = 8 bits?
Any help would be appreciated.
Today, RAM is byte addressable. Each address put on the address bus returns 1 byte. If you have 32 bits, the amount of different addresses that you can come up with is 2^32 = 4,294,967,296. Since you can have that much different addresses, then you can address that much bytes. In terms of bytes, this amount of bytes is called 4 GB.
I'm just checking to make sure I have a proper understanding of how memory access works.
Say I have a word-addressable memory system with 64-bit words.
How much memory could be accessed using a 32-bit address size?
A 64 bit word is 8 bytes, so we're dealing with an 8 byte word.
An 8 byte word can hold up to 2^8 (256).
Given that we have a 32 bit address, we have 2^32, but since each word is taking up 256 of those, (2^32)/256 = 1677216 bytes.
To put that into metric terms, we have 2^24 = (2^4) * (2^20) = 16 Mb.
Is this the proper way of doing this?
A 32 bit address provides 4,294,967,296 possible addresses. If the smallest addressable element is a 64 bit == 8 byte word (versus a byte), then the total amount of addressable space would be 4,294,967,296 x 8 = 34,359,738,368 bytes= 34GB.
As for the capacity of an 8 byte word, it's 8 bytes, not 2^8 = 256 bytes.
Note some old computers did have a basic addressing system that only addressed words. Byte accessing required a byte index or offset from a word based address. I don't think any current computers use such a scheme.
You are taking 32 bit address which means 2^32 bits can be addressed but if you want how many bytes can be address then just divide it like 2^32/8=2^29 because 1 byte have 8 bit
and if you want how many words can be addressed then 2^29/8 because 1 word contains 8 bytes so 2^26 words can be addressed.
And since one word is 8 byte so we can address (2^26)*8 bytes.
Hope it might help!
I am reading some text about about the virtual address space of a process and it says that
If we have virtual address that are 32 bits long, the virtual address space of the process can be up to 4 GB.
This may be a silly question but how is 4 GB calculated? How do you work it out from 32 bits?
2 to the power of 32 is what gives you 4 GB. So with 32 bits, you can refer a memory area of up to 4 Giga bytes of addresses.
I'm just checking to make sure I have a proper understanding of how memory access works.
Say I have a word-addressable memory system with 64-bit words.
How much memory could be accessed using a 32-bit address size?
A 64 bit word is 8 bytes, so we're dealing with an 8 byte word.
An 8 byte word can hold up to 2^8 (256).
Given that we have a 32 bit address, we have 2^32, but since each word is taking up 256 of those, (2^32)/256 = 1677216 bytes.
To put that into metric terms, we have 2^24 = (2^4) * (2^20) = 16 Mb.
Is this the proper way of doing this?
A 32 bit address provides 4,294,967,296 possible addresses. If the smallest addressable element is a 64 bit == 8 byte word (versus a byte), then the total amount of addressable space would be 4,294,967,296 x 8 = 34,359,738,368 bytes= 34GB.
As for the capacity of an 8 byte word, it's 8 bytes, not 2^8 = 256 bytes.
Note some old computers did have a basic addressing system that only addressed words. Byte accessing required a byte index or offset from a word based address. I don't think any current computers use such a scheme.
You are taking 32 bit address which means 2^32 bits can be addressed but if you want how many bytes can be address then just divide it like 2^32/8=2^29 because 1 byte have 8 bit
and if you want how many words can be addressed then 2^29/8 because 1 word contains 8 bytes so 2^26 words can be addressed.
And since one word is 8 byte so we can address (2^26)*8 bytes.
Hope it might help!
I have some problems with understanding, how virtual adress is translated in physical adress on x86-64. Especially, 39-12 bits of PTE describe PFN of physical page. The number of these bits is 28. 12 bits (from 0 to 11) of virtual adress describe the offset in this physical page. To sum up, we have 28 bits (PFN) and 12 bits(offset). Summing we have 40 bits, but physical adress should contain 64 bits, is it so??? Where is error in my reasoning????
64-bit CPUs do not necessarily have a 64-bit address bus. The virtual address space is 64 bits, but the physical address space only has to be large enough to support the largest reasonable amount of RAM.
I can't find a reference at the moment, but 40 bits (one terabyte) sounds about right.