I'm reading this book 3 easy pieces by remzi. In chapter 18 paging introduction in the first paragraph it is written
(real address spaces are much bigger, of course,
commonly 32 bits and thus 4-GB of address space, or even 64 bits)
Now if 1 byte is 8 bits, shouldn't 32 bits be 32/8 4 bytes space? I have seen the math for getting the answer as 4GB
2^10 = 1KB
2^10 = 1MB
2^10 = 1GB
But then this is assuming 2^1 = 1B, But isn't this simply wrong?
What am I missing? What does my answer (4Bytes) represent here?
This question is related How many bits are needed to address this much memory?
But doesn't address why my math is incorrect. (OP there also has the exact same confusion).
Lets say that I change the word size to 64MB (wild I know). Then number of words is 1. According to the answers, number of bits would be 2^0 = 1, 0 bits? Then where and when do we use the fact that 1 byte = 8 bits?
Any help would be appreciated.
Today, RAM is byte addressable. Each address put on the address bus returns 1 byte. If you have 32 bits, the amount of different addresses that you can come up with is 2^32 = 4,294,967,296. Since you can have that much different addresses, then you can address that much bytes. In terms of bytes, this amount of bytes is called 4 GB.
Related
I'm just checking to make sure I have a proper understanding of how memory access works.
Say I have a word-addressable memory system with 64-bit words.
How much memory could be accessed using a 32-bit address size?
A 64 bit word is 8 bytes, so we're dealing with an 8 byte word.
An 8 byte word can hold up to 2^8 (256).
Given that we have a 32 bit address, we have 2^32, but since each word is taking up 256 of those, (2^32)/256 = 1677216 bytes.
To put that into metric terms, we have 2^24 = (2^4) * (2^20) = 16 Mb.
Is this the proper way of doing this?
A 32 bit address provides 4,294,967,296 possible addresses. If the smallest addressable element is a 64 bit == 8 byte word (versus a byte), then the total amount of addressable space would be 4,294,967,296 x 8 = 34,359,738,368 bytes= 34GB.
As for the capacity of an 8 byte word, it's 8 bytes, not 2^8 = 256 bytes.
Note some old computers did have a basic addressing system that only addressed words. Byte accessing required a byte index or offset from a word based address. I don't think any current computers use such a scheme.
You are taking 32 bit address which means 2^32 bits can be addressed but if you want how many bytes can be address then just divide it like 2^32/8=2^29 because 1 byte have 8 bit
and if you want how many words can be addressed then 2^29/8 because 1 word contains 8 bytes so 2^26 words can be addressed.
And since one word is 8 byte so we can address (2^26)*8 bytes.
Hope it might help!
I'm just checking to make sure I have a proper understanding of how memory access works.
Say I have a word-addressable memory system with 64-bit words.
How much memory could be accessed using a 32-bit address size?
A 64 bit word is 8 bytes, so we're dealing with an 8 byte word.
An 8 byte word can hold up to 2^8 (256).
Given that we have a 32 bit address, we have 2^32, but since each word is taking up 256 of those, (2^32)/256 = 1677216 bytes.
To put that into metric terms, we have 2^24 = (2^4) * (2^20) = 16 Mb.
Is this the proper way of doing this?
A 32 bit address provides 4,294,967,296 possible addresses. If the smallest addressable element is a 64 bit == 8 byte word (versus a byte), then the total amount of addressable space would be 4,294,967,296 x 8 = 34,359,738,368 bytes= 34GB.
As for the capacity of an 8 byte word, it's 8 bytes, not 2^8 = 256 bytes.
Note some old computers did have a basic addressing system that only addressed words. Byte accessing required a byte index or offset from a word based address. I don't think any current computers use such a scheme.
You are taking 32 bit address which means 2^32 bits can be addressed but if you want how many bytes can be address then just divide it like 2^32/8=2^29 because 1 byte have 8 bit
and if you want how many words can be addressed then 2^29/8 because 1 word contains 8 bytes so 2^26 words can be addressed.
And since one word is 8 byte so we can address (2^26)*8 bytes.
Hope it might help!
I need help understanding memory. How many bytes can be stored in a memory unit that uses 8 address bits and a 16 bit architecture?
I think it's 2^8 = 256. Is this correct?
Edit: I mean 256
It depends.
Firstly "16 bit architecture" is too vague to be a helpful characterization for this problem. A characterization like that generally refers to the width of registers and data paths (e.g. in the ALU), not how memory is addressed.
Secondly, the answer actually depends on whether the addresses are byte addresses or "word" addresses. AFAIK "almost all" new processor / instruction set architectures designed since the 1980's have used byte addresses. But prior to that it was common for addresses to address words of up to 60 bits (or possibly more).
But assuming byte addressing, then an 8 bit address allows you to address 2^8 bytes; i.e. 256 bytes.
On the other hand, if we assume word addressing with a 16 bit word, then 8 bit addresses will address 256 words ... which is 512 bytes.
The base answer is the 2^number of bits. However,long ago sixteen bit systems came up with means for accessing more than 2^16 memory though segments. While an application can only access 2^16 bytes at a time, changing the values in hardware registers allows the application to change which 2^16 bytes of a larger address space are being accessed.
You typically do things like
Map buffer 1 to the address space.
Queue a read operation to the buffer.
Map another buffer 2 to the address space.
Read operation completes-map Buffer 1 back so that the data can be accessed.
I'm reading a book about assembly; Jones and Bartlett Publishers Introduction to 80x86 Assembly
The author give exercises but no answers to it. Obviously before going further, I want
to make sure that I fully understand the chapter concepts.
donc,
What is the 8-hex-digit address of the "last" byte for a PC with 32 MBytes of RAM
This is my solution:
1) convert to bits
32 MBytes = 268435456 bits
2) I subtract 8 bits to remove the last byte
268435448
3) conversion to hexadecimal
FFFFFF8
So I got FFFFFF8
Does this look a good answer?
No. For assembly programming it's very helpful to be able to do simple power-of-2 calculations in your head. 1K is 2^10. So 1M is 2^20. So 32M is 2^25 (because 2^5 = 32). So the address of the last byte is 2^25-1 (because the first byte is at 0). This is 25 bits that are all 1's (because 2^n-1 is always n 1's). In hex, this is six F's (4 bits per F) plus an additional 1, so prepending a zero to get 8 hex digits, you have 01FFFFFF.
There are two things you should think about:
For most computers (all PCs) adresses are given in bytes, not in bits.
Therefore you must calculate: 32 MByte = 33554432 Bytes, minus 1 byte = 01FFFFFF (hex) as "Gene" wrote in his answer.
In reality (if you are interested in) you must also think about the fact that there is a "gap" in the address area (from 000A0000 to 000FFFFF) of real PCs so either not all the RAM is useable or the last address of the RAM comes later. This area is used for the graphics card and the BIOS ROM.
I thinking is : 00007FFF
because: 32MB = 32*1024 = 32768
byte last have address 32767 (7FFF)
I am confused with so many terminologies that my instructor talks about such as word,byte addressing and memory location.
I was under the impression that for a 32-bit processor,
it can address upto 2^32 bits, which is 4.29 X 10^9 bits (NOT BYTES).
The way I think now is:
The memory is like an array of buckets each of 1 byte length.
when we say byte addressing (which I guess is the most common ones), each char is 1 byte and is retrieved from the first bucket (say for example).
for int the next 4 bytes are put together in little-endian ordering to compute the Integer value.
so each memory, I see it as, 8 bits or 1 byte, which can give upto 2^8 locations, this is far less than what cpu can address.
There is some very basic mis-understanding here on my part which if some experts can explain in simple terms that a prosepective CS-major student can it in once forever.
I have read various pages including this one on word and here the unit of address resolution is given as 8b for ARM, which adds more to my confusion.
The processor uses 32 bits to store an address. With 32 bits, you can store 2^32 distinct numbers, ranging from 0 to 2^32 - 1. "Byte addressing" means that each byte in memory is individually addressable, i.e. there is an address x which points to that specific byte. Since there are 2^32 different numbers you can put into a 32-bit address, we can address up to 2^32 bytes, or 4 GB.
It sounds like the key misconception is the meaning of "byte addressing." That only means that each individual byte has its own address. Addresses themselves are still composed of multiple bytes (4, in this case, since four 8-bit bytes are taken together and interpreted as a single 32-bit number).
I was under the impression that for a 32-bit processor, it can address upto 2^32 bits, which is 4.29 X 10^9 bits (NOT BYTES).
This is typically not the case -- bit-level addressing is quite rare. Byte addressing is far more common. You could design a CPU that worked this way, though. In that case as you said, you would be able to address up to 2^32 bits = 2^29 bytes (512 MiB).
For one bit, You would have 0 or 1 and For two bits, you would have 00, 01, 10, 11. For 8 bits, you would have 2^8 which is 256 address values. Address and Data are separate terms. Address is the location and Data is the content in that location. Data width(content) is how many bits you could store in one memory cell address.(Think like an apartment with bedrooms- each apartment in a building has two bedrooms)and Data depth(address) is how many addresses you would have(In a building how many apartments you would have #1 thru #1400 etc). One bit in the CPU register can reference an individual byte in memory like one number in apartment number can reference one apartment. SIMM module RAMs had 32 bit Data width and DIMM modules have 64 bit Data width. It means in one memory address in DIMM, It stores 64 bits data. How many addresses can be multiplexed by two wires (two bit processing), you could make 4 addresses. (Each of these addresses could hold 64 bits if it is DIMM module ). 32 bit processing means, 32 wires, 2^32 address options. Even though, 64 bit processing has 64 bit registers and internal bus (wires) as 64 bit, http://www.tech-faq.com/address-bus.html, address bus max is 44 bits. means 2^44 maximum addressing can be achieved by Intel Super Server CPU Itanium 2.