For example, if my ram memory runs at 1333MHz and my processor runs at 4GHz, how can the memory controller (situated in the processor) send commands (active, read, write, etc.) to RAM memory if they both are running at different speed?
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I have a Zynq 7020 chip with 250 MB of DDR memory attached to it put in ECC mode (so 125 MB effectively). It's attached to NAND flash memory and has a series of bootloaders which eventually load VxWorks to run some stuff.
We are about to do a test which will require me to read all the memory, flash, and FPGA configuration memory on the device after execution.
I have another [small] program that I will install via JTAG after the run and have it write out the rest of the RAM, then all the flash and FPGA configuration memory. This program is compiled by the Xilinx SDK and is bare-metal (no OS/bootloader).
When I load this program, I reset the processor (JTAG command), run a ps7_init.tcl script that sets all the CPU registers to a good configuration as set by Vivado, load the elf file onto the device, then run the processor. This program then tries to read memory starting at the address 0x0, but it crashes quickly. I told it to start at an address of 1 MB (1<<20) (because I know there's some weird memory map stuff at the beginning, so I tried this just in case) and it reads a little bit more then crashes again.
The crash appears to be the CPU not letting me read these areas of RAM.
Why not? How do I make it so I can read every byte of the 125 MB of RAM I have?
There is a template project that Xilinx provides that is close to exactly what you are trying to do. It is the "Memory Tests" template, and it runs through attached memory ranges and tests read/write operations. By default it tests DDR memory range and ps7_ram_1. The linker script for the application puts the program in ps7_ram_0, and doesn't test that range since you can't overwrite instruction and data memory for the application.
Code for the template can be found here:
<SDK installation directory>\data\embeddedsw\lib\sw_apps\memory_tests
I would recommend creating a new project from this template, and changing the memorytest.c file to fit your need.
To answer your question more directly: You are likely running into problems with the processors MMU (memory management unit) and cache management. If your application is being loaded into DDR, then it is possible that it is blocking you from accessing application instruction and data memory. If your application is loaded into OCM (like the template) there may be access problems with the memory in cache. If you disable cache using
Xil_DCacheDisable();
Then you should be able to read from the entire DDR memory space (as long as it exists). Make sure that you configure your applications linker script (*.ld) so that the application knows which memory devices are out there, their base addresses and size.
In the book "Operating System Concept by SILBERSCHATZ, GALVIN & GAGNE", they've mentioned that,
Main Memory(Primary memory) and the registers built into the processor itself are the only storage that CPU can access directly
This statement has caused a lot of confusion. If CPU can not access Secondary Memory, then how does it fetch a program from Secondary Memory?
CPU can't access Secondary memory directly doesn't mean It can't access it anyway. when System is booted, BIOS inbuilt program (in ROM) copy boot loader (from secondary bootable device) to RAM's memory and ask cpu to continue execution from that particular address.
Once CPU starts executing Boot loader, Boot loader calls necessary function to read from disk (secondary storage) and copy your OS kernel image into memory. transfer of data is done through I/O ports.
You have your kernel image into memory, and thus boot loader ask cpu to jump to kernel's entry point. You have your kernel starting up this point.
Kernel setup OS environment, load up necessary drivers (including disk/cd-rom driver). After this point, It is up to OS disk driver that It performs I/O port operation or DMA access to load up data from secondary storage.
Generally DMA is preferred because It does not involve CPU for polling up data from device, but It is little difficult to code.
I hope I cleared your doubt :)
I typically use about 5GB of RAM on my workstation at work. I normally have to run a few instances of matlab at a time, each running simulink simulations. These use a total of about 4-6GB RAM. When these are active, windows dumps memory in RAM to the page file to free space for matlab.
The problem is when the simulations are over, 2-3GB stays in the page file and slows the systems DRAMATICALLY. This computer has AWFUL disk read and write performance.
Is there a way I can move the paged memory back over to ram to avoid this performance hit?
Right now I am required to restart my computer when I am done running the simulations to speed it up again.
I have 8GB RAM with a 12GB page file.
Check out
Is it possible to unpage all memory in Windows?
The answer given by #KerrekSB seems to include some code for doing it. But the long and short of it is that you need to walk the list of processes, then walk the list of memory allocations for those processes, reading as you go.
I have a high end machine with 32 GB and I want to effectively utilize the available RAM for Java Process. Practically, I have seen I can run at max 3 JBoss instances (or Java Process) with Max 3GB Heap Size in one box still I have 20GB free space not utilized. Is it possible to create Java Program that can effectively directly work with RAM like C++, not relying on Java Memory Model for creating objects on JVM and also not relying on GC to reclaim memory. I mean Java Program directly working with RAM
I am trying to monitor the physical DRAM. Specifically, I am trying to find out the humber of reads and writes performed on the physical DRAM so that I can have a rough estimate of what the total memory energy consumption is when running a specific application. Do you know about any tools that would help with this measurements?