Beagle Bone Black LED's physical address - beagleboneblack

Is there anyway we can find the physical address of the BBB's LEDs?
I am new to this, but I am trying to write a device driver that access hardware directly.
Thank you :).

Yes, you can consult the BBB schematics to find the pins connecting LEDs here. Let me help you with that.
And here are the actual chipset pins.
So, you need to access and control the pins GPIO1_21, GPIO1_22, GPIO1_23 and GPIO1_24. For this, you need to make sure no other driver is configuring/using these pins. Most probably these pins are already being controlled by the existing "gpio-leds" driver. See the device tree node for gpio-led driver below (source)
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_s0>;
compatible = "gpio-leds";
led#2 {
label = "beaglebone:green:heartbeat";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led#3 {
label = "beaglebone:green:mmc0";
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led#4 {
label = "beaglebone:green:usr2";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu0";
default-state = "off";
};
led#5 {
label = "beaglebone:green:usr3";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
};
You need to either disable or override the above node to use your own driver. Also make sure to select the correct pinmux setting for your driver so these pins are in gpio mode. You can reuse the default "user_leds_s0" pin group shown below.
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
>;
};
Finally, instead of using the physical address of the GPIO pin directly, you should use Linux's GPIO interface as it has already taken control of the GPIO registers. Your final devicetree node for your custom driver could look something like this:
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_s0>;
compatible = "my-gpio-led-driver";
userled-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>, /* USR0 */
<&gpio1 22 GPIO_ACTIVE_HIGH>, /* USR1 */
<&gpio1 23 GPIO_ACTIVE_HIGH>; /* USR2 */
<&gpio1 24 GPIO_ACTIVE_HIGH>; /* USR3 */
}
In the driver code, you can refer to these GPIO pins as below
struct gpio_desc *usr_led0, *usr_led1, *usr_led2, *usr_led3;
usr_led0 = gpiod_get_index(dev, "userled", 0, GPIOD_OUT_HIGH);
usr_led1 = gpiod_get_index(dev, "userled", 1, GPIOD_OUT_HIGH);
usr_led2 = gpiod_get_index(dev, "userled", 2, GPIOD_OUT_HIGH);
usr_led3 = gpiod_get_index(dev, "userled", 3, GPIOD_OUT_HIGH);
Then you can use linux gpio consumer interface (gpiod_* API) to control the leds.
Follow these links for more details:
Requesting the GPIO pins required in the device tree.
Getting and controlling the GPIO pins from kernel driver.

Related

Driving a TMC5160 from ESP32

I am trying to use the TMC5160 library by Tom Magnier and having a couple of issues. I am using the SPI interface version of the BigTreeTech chip and have the following pins hooked up.
Hardware setup :
MOSI (ESP32 : 23) <=> SDI
MISO (ESP32 : 19) <=> SDO
SCK (ESP32 : 18) <=> SCK
ESP32:5 <=> CSN
ESP32:25 <=> DRV_ENN (optional, tie to GND if not used)
GND <=> GND
3.3V (ESP32 : ) <=> VCC_IO (depending on the processor voltage)
I am basically just trying to implement the sample and it appears I can configure the driver with the defaults as it finds the chip and shows status. But, it will not respond to motor control. I am wondering if I am missing something in the connection to the ESP32.
My code for initialization and testing.
void izTMC5160::Initialize()
{
_log->Log("izTMC5160::Initialize starting...");
pinMode(_enablePin, OUTPUT);
digitalWrite(_enablePin, LOW); // Active low
SPI.begin();
// This sets the motor & driver parameters /!\ run the configWizard for your driver and motor for fine tuning !
powerStageParams.drvStrength = 2;
powerStageParams.bbmTime = 24;
powerStageParams.bbmClks = 0;
motorParams.globalScaler = 219;
motorParams.irun = 31;
motorParams.ihold = 15;
// motorParams.freewheeling = 0;
motorParams.pwmOfsInitial = 30;
motorParams.pwmGradInitial = 0;
motor.begin(powerStageParams, motorParams, TMC5160::NORMAL_MOTOR_DIRECTION);
// ramp definition
motor.setRampMode(TMC5160::POSITIONING_MODE);
motor.setMaxSpeed(_maxSpeed);
motor.setAcceleration(_acceleration);
delay(_startupDelay); // Standstill for automatic tuning
_log->Log("izTMC5160::Initialize completed...");
}
void izTMC5160::Test()
{
_testDir = !_testDir;
motor.setTargetPosition(_testDir ? _testSteps : -_testSteps); // 1 full rotation = 200s/rev
float xactual = motor.getCurrentPosition();
float vactual = motor.getCurrentSpeed();
char buffer[256];
sprintf(buffer, "izTMC5160::Test - Current position: %f Current Speed: %f",xactual,vactual);
_log->Log(buffer);
}
void izTMC5160::Enable(bool enable)
{
if(enable)
{
digitalWrite(_enablePin,LOW);
}
else
{
digitalWrite(_enablePin,HIGH);
}
}
the example works,
my guess is you have not enabled motion control mode.
the bigtree tech tmc5160 doesnt offer an easy way to adjust spi and sd mode selectors,there version one did hopefully the next batch will also.
see here for fix :https://github.com/bigtreetech/BIGTREETECH-TMC5160-V1.0/issues/8

I have a problem reading ADC with DMA on STM32 F767zi. When I look into the buffer, all I see are zeros, and I do not know why?

The size of my buffer is 4096 and I want to fill the buffer with the adc values that are read.
#define ADC_BUF_LEN 4096
uint16_t adc_buf[ADC_BUF_LEN];
I am using this function to start the reading process of the ADC using DMA
HAL_ADC_Start_DMA(&hadc2, (uint32_t*)adc_buf, ADC_BUF_LEN);
Here are my configurations for the ADC
hadc2.Instance = ADC2;
hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV6;
hadc2.Init.Resolution = ADC_RESOLUTION_12B;
hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE;
hadc2.Init.ContinuousConvMode = ENABLE;
hadc2.Init.DiscontinuousConvMode = DISABLE;
hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc2.Init.NbrOfConversion = 1;
hadc2.Init.DMAContinuousRequests = ENABLE;
hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
if (HAL_ADC_Init(&hadc2) != HAL_OK)
{
Error_Handler();
}
This my DMA configuration
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();
/* DMA interrupt init */
/* DMA2_Stream2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
}
These are my interrupt functions. I set a toggle breakpoint on the first interrupt and when I debug, the LED does not turn on which suggests that the DMA isn't working?
/* USER CODE BEGIN 4 */
//Called when first half of buffer is filled
void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) {
//HAL_ADC_GetValue(&hadc2);
HAL_GPIO_WritePin(LD3_GPIO_Port, LD3_Pin, GPIO_PIN_SET);
}
//Called when buffer is completely filled
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc){
HAL_GPIO_WritePin(LD3_GPIO_Port, LD3_Pin, GPIO_PIN_RESET);
}
I set the prescaled to be divided by 6 if this information helps.
Please give me some advice!
Thank you in advance.

why use cpu_to_le32 for the DMA address but not for length? (in an example code in a book)

I was reading the book Essential Linux Device Driver (by Sreekrishnan Venkateswaran) and in Chapter 10 Listing 10.5. Setting Up DMA Descriptors and Buffers, I see
/* Device-specific data structure for the Ethernet Function */
struct device_data {
struct pci_dev *pdev; /* The PCI Device structure */
struct net_device *ndev; /* The Net Device structure */
void *dma_buffer_rx; /* Kernel virtual address of the receive descriptor */
dma_addr_t dma_bus_rx; /* Bus address of the receive descriptor */
void *dma_buffer_tx; /* Kernel virtual address of the transmit descriptor */
dma_addr_t dma_bus_tx; /* Bus address of the transmit descriptor */
/* ... */
spin_lock_t device_lock; /* Serialize */
} *mydev_data;
/* On-card registers related to DMA */
#define DMA_RX_REGISTER_OFFSET 0x0 /* Offset of the register holding the bus address of the RX descriptor */
#define DMA_TX_REGISTER_OFFSET 0x4 /* Offset of the register holding the bus address of the TX descriptor */
#define CONTROL_REGISTER 0x8 /* Offset of the control register */
/* Control Register Defines */
#define INITIATE_XMIT 0x1
/* Descriptor control word definitions */
#define FREE_FLAG 0x1 /* Free Descriptor */
#define INTERRUPT_FLAG 0x2 /* Assert interrupt after DMA */
/* Invoked from Listing 10.3 */
static void dma_descriptor_setup(struct pci_dev *pdev)
{
/* Allocate receive DMA descriptors and buffers */
mydev_data->dma_buffer_rx = pci_alloc_consistent(pdev, 3096, &mydev_data->dma_bus_rx);
/* Fill the two receive descriptors as shown in Figure 10.2 */
/* RX descriptor 1 */
mydev_data->dma_buffer_rx[0] = cpu_to_le32((unsigned long)(mydev_data->dma_bus_rx + 24)); /* Buffer address */
mydev_data->dma_buffer_rx[1] = 1536; /* Buffer length */
mydev_data->dma_buffer_rx[2] = FREE_FLAG; /* Descriptor is free */
/* RX descriptor 2 */
mydev_data->dma_buffer_rx[3] = cpu_to_le32((unsigned long)(mydev_data->dma_bus_rx + 1560)); /* Buffer address */
mydev_data->dma_buffer_rx[4] = 1536; /* Buffer length */
mydev_data->dma_buffer_rx[5] = FREE_FLAG; /* Descriptor is free */
wmb(); /* Write Memory Barrier */
/* Write the address of the receive descriptor to the appropriate register in the card. The I/O base address, ioaddr, was populated in Listing 10.3 */
outl(cpu_to_le32((unsigned long)mydev_data->dma_bus_rx), ioaddr + DMA_RX_REGISTER_OFFSET);
/* Allocate transmit DMA descriptors and buffers */
mydev_data->dma_buffer_tx = pci_alloc_consistent(pdev, 3096, &mydev_data->dma_bus_tx);
/* Fill the two transmit descriptors as shown in Figure 10.2 */
/* TX descriptor 1 */
mydev_data->dma_buffer_tx[0] = cpu_to_le32((unsigned long)(mydev_data->dma_bus_tx + 24)); /* Buffer address */ <---- line A
mydev_data->dma_buffer_tx[1] = 1536; /* Buffer length */ <---- line B
/* Valid descriptor. Generate an interrupt after completing the DMA */
mydev_data->dma_buffer_tx[2] = (FREE_FLAG | INTERRUPT_FLAG);
/* TX descriptor 2 */
mydev_data->dma_buffer_tx[3] = cpu_to_le32((unsigned long)(mydev_data->dma_bus_tx + 1560)); /* Buffer address */
mydev_data->dma_buffer_tx[4] = 1536; /* Buffer length */
mydev_data->dma_buffer_tx[5] = (FREE_FLAG | INTERRUPT_FLAG);
wmb(); /* Write Memory Barrier */
/* Write the address of the transmit descriptor to the appropriate register in the card. The I/O base, ioaddr, was populated in Listing 10.3 */
outl(cpu_to_le32((unsigned long)mydev_data->dma_bus_tx), ioaddr + DMA_TX_REGISTER_OFFSET);
}
/* Invoked from Listing 10.3 */
static void dma_descriptor_release(struct pci_dev *pdev)
{
pci_free_consistent(pdev, 3096, mydev_data->dma_bus_tx);
pci_free_consistent(pdev, 3096, mydev_data->dma_bus_rx);
}
In the code, the driver prepares a buffer for the DMA descriptors and DMA buffers using pci_alloc_consistent() and sets them up and passes the buffer address (bus address) to the hardware making sure it's in little endian format using cpu_to_le32(). So I understood the H/W sees the buffer descriptor. But in the descriptor, why did it use cpu_to_le32() for the descriptor address (line A above) and not for the following buffer length (line B above)? Does the H/W see only the buffer address and not the size? Or is it an error in the book? By the way, this is for a fictitious PCI ethernet chip driver.
In practice such approach indeed looks like a mistake. But theoretically it's possible that one field (address) is always little endian no matter what, while another (length) is in native mode. Nowadays, with help of FPGA, I guess one even may try to implement this theoretical case.
So, in the given context, especially taking into consideration your remark that this is for a fictitious PCI ethernet chip, it is a bit hard to say what was author's intention here.

Interfacing an I2S microphone with BeagleBone Black

I am trying to interface an I2S microphone (https://www.adafruit.com/product/3421) with BeagleBone Black. I followed the article (http://www.ti.com/lit/an/sprac97/sprac97.pdf), and able to update the device tree, and the Linux kernel as suggested in the article.
The I2S component (for microphone) of the device tree is included as a dtsi in the main device tree source. The content of the dtsi is as below
&am33xx_pinmux {
mcasp1_pins: mcasp1_pins {
pinctrl-single,pins = <
/* sink must enable receivers */
0x1a0 0x23
/* P9_42 mcasp1_aclkx - bit clock */
0x1a4 0x23
/* P9_27 mcasp1_fsx - frame sync */
0x1a8 0x23
/* P9_41 mcasp1_axr0 - i2s input */
>;
};
};
&mcasp1 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcasp1_pins>;
status = "okay";
op-mode = <0>;
tdm-slots = <2>;
num-serializer = <4>;
serial-dir = < /* 1 TX 2 RX 0 unused */
2 0 0 0
>;
rx-num-evt = <1>;
tx-num-evt = <1>;
};
/ {
pcm5102a: pcm5102a {
#sound-dai-cells = <0>;
compatible = "ti,pcm5102a";
status = "okay";
};
sound1: sound#1 {
compatible = "simple-audio-card";
simple-audio-card,name = "PCM5102a";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound1_master>;
simple-audio-card,frame-master = <&sound1_master>;
simple-audio-card,bitclock-inversion;
simple-audio-card,cpu {
sound-dai = <&mcasp1>;
};
sound1_master: simple-audio-card,codec {
#sound-dai-cells = <0>;
sound-dai = <&pcm5102a>;
clocks = <&mcasp1_fck>;
clock-names = "mclk";
};
};
};
The final device tree (decompiled from am335x-boneblack.dtb) is attached here. McASP entries (mcasp1_pins), including pins as specified in the TI document above are on line no 1077.
I have also compiled the kernel with a new driver pcm5102 as suggested in the document. Finally, I see the driver listed in the output of the arecord command.
root#arm:/sys/class/gpio# arecord -l
**** List of CAPTURE Hardware Devices ****
card 0: PCM5102a [PCM5102a], device 0: davinci-mcasp.0-pcm5102a-hifi pcm5102a-hifi-0 []
Subdevices: 1/1
Subdevice #0: subdevice #0
However whenever I try to record audio, I am not getting any audio data. The audio file is formed, but the file size is always 44 bytes irrespective of how long I try to record audio for. Clearly no data is there in the file.
Recording using arecord command gives error as below
arecord -d 10 -Dhw:0,0 -f dat audio.wav
Recording WAVE 'audio.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
arecord: pcm_read:2032: read error: Input/output error
Moreover, whenever I try to connect the clock (MCASP1_ACLKR (Bit Clock) - P9_42) with my oscilloscope, I don't see any pulses. Looks like there is no proper clock signal on this pin. What can I do to debug, and fix this?
Any ideas?
Parag
The PCM1864 board used in the link you provided generates its own clock and operates in master mode. The microphone you are using, however, requires the bus master to generate both the bit clock and frame sync signals to operate.
The McASP module of the am33xx processor can generate these signals, although some modifications to the driver/device tree might be necessary.
The mcasp signals can be mapped to the following pins on the BeagleBone board (generated by TI's pinmux tool). Note, the device used here is mcasp0, not mcasp1. I assume TI was using a different version of the beagle bone which had mcasp1 connected to the IO header.
pinctrl-single,pins = <
AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (A14) mcasp0_ahclkx.mcasp0_ahclkx */
AM33XX_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (C12) mcasp0_ahclkr.mcasp0_ahclkr */
AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (A13) mcasp0_aclkx.mcasp0_aclkx */
AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (B13) mcasp0_fsx.mcasp0_fsx */
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (B12) mcasp0_aclkr.mcasp0_aclkr */
AM33XX_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (C13) mcasp0_fsr.mcasp0_fsr */
AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (D12) mcasp0_axr0.mcasp0_axr0 */
AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (D13) mcasp0_axr1.mcasp0_axr1 */
>;
According to the datasheet of the processor, the clock signals of the receiver (ahclkr, aclkr, fsr) can be setup to run independently of of in sync with the clock signals of the transmitter and dividers can be specified as necessary. The pins which are used to provide the clock signals will need to be set to PIN_OUTPUT.
It seems to me that the overlay provided by beagle board here, when used in conjunction with the default clock device tree insert here, derives the clocks from the system clock. You might want to experiment with this.

PIC18F26J13, SPI2 mapped on PORTB, doesnt work

I am working on a project with a 18f26j13, where i need I2C on MSSP1, and SPI on MSSP2. my I2C works perfectly, but i cant get the SPI to work on port B, if i map them to port c, it works perfectly, so i am thinking that there is something i am not disabling on port b.
I remap the pins to port B, and sets the pins as digital i/o in ANCON, and ofc sets the tris bit for RB4
i have a feeling i have tried everything, but that i am missing something obvious, and i am really hoping someone can help :)
EDIT: ohh i forgot... i can meassure a clock on SCK2/RB3, and pulses on SDO2/RB5, so i looks like the problem is with RB4...
EDIT2: Well i was wrong, the problem is with RB5, if i map SDO2 to RB2, then it works, still a problem though since kinda have to attach it to RB5...
void peripheral_init(void)
{
//disabler alle ADC
ADCON0 = 0b00000000; //adc disabled, ref = Vss,Vdd
ANCON0 = 0b11111111; //alle adc kanaler disabled
ANCON1 = 0b00011111; //alle adc kanaler disabled
ADCON1 = 0b10111110; //
//disabling comperator
CM1CON = 0b00000000;
CM2CON = 0b00000000;
CM3CON = 0b00000000;
//mapping SPI2 to portb
PPSUnLock()
iPPSInput(IN_FN_PPS_SDI2,IN_PIN_PPS_RP7); //RB4
iPPSInput(IN_FN_PPS_SCK2IN,IN_PIN_PPS_RP6); //RB3
iPPSOutput(OUT_PIN_PPS_RP6,OUT_FN_PPS_SCK2); //RB3
iPPSOutput(OUT_PIN_PPS_RP8,OUT_FN_PPS_SDO2); //RB5
PPSLock();
//port setup
TRISA = 0b00000011;
LATA = 0b00000000;
TRISB = 0b00010010;
LATB = 0b00010000;
TRISC = 0b10010000; //bit 3+4 = i2c bit 7 = uart1 rx
LATC = 0b00000000;
}
void interupt_init(void)
{
INTCON = 0b00000000;
INTCON2 = 0b10000000; //disabling the weak pullup on portb
INTCON3 = 0b00000000;
}
void SpiInit(void)
{
nCS = 1;
SSP2STAT = 0xC0;
SSP2CON1 = 0b00110000; // Timer2 output 400KHz
}

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