Calculating stack top address in 8086 - stack

If the stack segment register of an 8086 contains 1234H and stack pointer register contains 4321H , what is the physical address of the top of the stack?
How will I calculate this?

The 8086 calculates a 20-bit physical address by taking the SS register and shifting it left by 4. To this is added the SP offset. In your example:
SS is shifted left by 4 to give 12340H.
SP (4321H) is added in to give 16661h.

Stack TOP address= SS*10H + SP

Related

write program to read a stack with size 10 then push 6 integer number

write program to read a stack with size 10 then push 6 integer number and if number even put it in another stack and if odd put it in a third stack then print the 3 stack?
write program to read a stack with size 10 then push 6 integer number and if number even put it in another stack and if odd put it in a third stack then print the 3 stack?
//How do I solve it?

Assuring stack pointer alignment using bitwise operators

Assume I want to reserve 8 bytes on the stack and I also want to make sure current stack pointer is 8 byte aligned. I have seen some codes that assure current sp is 8 bye aligned using this logic:
sp = sp & -8;
They AND it with the amount they are going to reserve on the stack (which of course is negative).
How does this logic work?
It works because negative numbers are represented in two's complement, so -8 is equivalent to ~7, of which the 3 least significant bits are 0s and the rest are 1s. ANDing this with a value clears the 3 least significant bits, which obviously results in it being 8-byte aligned. By the way, this trick only works to align things to powers of 2. If you had some strange reason to align things to a 12-byte boundary, for example, sp = sp & -12 would not work as intended.

Calculating the table entry size

I got a question like this and need to calculate the table entry size.
Microsoft Windows 98 used a 32-bit memory address space while the default page size was 4KB. If it is having a physical memory of 256MB
i) What is the size of an entry in the page table?
Does this equal to page offset?
In 32-bit Intel, the page table entry is 32-Bits.
Size of an entry in the page table is 32-12 = 20.

Segmented memory management

This is a very simple question ! It has to do with a programming challenge where you had to write a virtual machine that is based on a segmented memory model with 16-byte segment size (notation seg:offset). We have also 2 segment registers (cs, ds)! The machine is initialized with cs=0x0 and ds =0x10
http://www.canyoucrackit.co.uk//15b436de1f9107f3778aad525e5d0b20.js
Questions:
1) Why ds = 0x10 (=16) ? Is this arbitrary for the specific virtual machine?
2) If cs=0 and ds = 16, then the data and code segments overlap to each other! How can code segment and data segment overlap?
3) Codes segment and data segment are fixed size (in this case 16-byte)! i thought that their size is dynamic! More generic: when we say "code segment" we mean that we have a dynamic size segment which can be further divided into fixed size small segments?
What am i missing here ??

Confusion between higher address and lower address

I am very new to Assembly language. I was reading about MIPS architecture and I am stuck with a concept.
In the image above,shouldn't the highest address be the last item of the stack and the lowest address at the top? As the address are generated in ascending order.
Thanks in advance.
The top of the stack is the position of the last element that was pushed on. Looking at that picture, the 'top' of the stack is towards the bottom, which has a lower address. The addresses are generated in decending, not ascending order.
It is called the top as a stack is a LIFO (Last In First Out) structure - the last object added is the first one removed, and is therefore 'on top'.

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