Youtube Stream fmt_stream_map Quality - youtube
I get the Stream URL by parsing "fmt stream map",
The problem is if my video duration is under 1 hour I get this:
{
"comment_count" = 1;
description = "";
"dislikes_num" = 0;
duration = "54:46";
"encrypted_id" = WWjNEyHrNsk;
"fmt_stream_map" = (
{
"fallback_host" = "tc.v7.cache6.c.youtube.com";
itag = 22;
quality = hd720;
type = "video/mp4; codecs=\"avc1.64001F, mp4a.40.2\"";
url = "http://r4---sn-bvvbax-8pxl.c.youtube.com/videoplayback?sver=3&ipbits=8&itag=22&key=yt1&expire=1366039593&upn=phUk9-1Fjyw&signature=34CDFF5AAC4E5BB24177EAA001B5519E0218A04E.A437435FC87FD09D7AD95E0417A4EA77BC786C86&ms=au&mv=m&mt=1366015457&app=youtube_mobile&ip=85.127.44.131&fexp=906370%2C923120%2C932000%2C932004%2C906383%2C916911%2C916910%2C902000%2C901208%2C919512%2C929903%2C925714%2C931202%2C900821%2C900823%2C931203%2C906090%2C909419%2C908529%2C930807%2C919373%2C930803%2C906836%2C920201%2C929602%2C930101%2C930609%2C926403%2C900824&sparams=cp%2Cid%2Cip%2Cipbits%2Citag%2Cratebypass%2Csource%2Cupn%2Cexpire&el=watch&newshard=yes&id=5968cd1321eb36c9&cp=U0hVS1BOV19OTUNONV9ISEFGOmh3anpiZHFRODBI&dnc=1&yms=izkxzhrL53I&source=youtube&ratebypass=yes";
},
{
"fallback_host" = "tc.v14.cache4.c.youtube.com";
itag = 18;
quality = medium;
type = "video/mp4; codecs=\"avc1.42001E, mp4a.40.2\"";
url = "http://r4---sn-bvvbax-8pxl.c.youtube.com/videoplayback?sver=3&ipbits=8&itag=18&key=yt1&expire=1366039593&upn=phUk9-1Fjyw&signature=BCA6FFE2575EE8947CFF52E91D0C8896538E239F.33FE7FF507257A8F5161A1E4C80A101BE4EB693F&ms=au&mv=m&mt=1366015457&app=youtube_mobile&ip=85.127.44.131&fexp=906370%2C923120%2C932000%2C932004%2C906383%2C916911%2C916910%2C902000%2C901208%2C919512%2C929903%2C925714%2C931202%2C900821%2C900823%2C931203%2C906090%2C909419%2C908529%2C930807%2C919373%2C930803%2C906836%2C920201%2C929602%2C930101%2C930609%2C926403%2C900824&sparams=cp%2Cid%2Cip%2Cipbits%2Citag%2Cratebypass%2Csource%2Cupn%2Cexpire&el=watch&newshard=yes&id=5968cd1321eb36c9&cp=U0hVS1BOV19OTUNONV9ISEFGOmh3anpiZHFRODBI&dnc=1&yms=izkxzhrL53I&source=youtube&ratebypass=yes";
},
{
"fallback_host" = "tc.v3.cache3.c.youtube.com";
itag = 36;
quality = small;
type = "video/3gpp; codecs=\"mp4v.20.3, mp4a.40.2\"";
url = "http://r4---sn-bvvbax-8pxl.c.youtube.com/videoplayback?sver=3&ipbits=8&itag=36&key=yt1&expire=1366039593&upn=phUk9-1Fjyw&signature=8174E39396391843AFA940C30624A823E5275890.B323AA44059ED3928A47C4AEA1BC82F3C565F433&ms=au&mv=m&mt=1366015457&app=youtube_mobile&ip=85.127.44.131&fexp=906370%2C923120%2C932000%2C932004%2C906383%2C916911%2C916910%2C902000%2C901208%2C919512%2C929903%2C925714%2C931202%2C900821%2C900823%2C931203%2C906090%2C909419%2C908529%2C930807%2C919373%2C930803%2C906836%2C920201%2C929602%2C930101%2C930609%2C926403%2C900824&sparams=cp%2Cid%2Cip%2Cipbits%2Citag%2Cratebypass%2Csource%2Cupn%2Cexpire&el=watch&newshard=yes&id=5968cd1321eb36c9&cp=U0hVS1BOV19OTUNONV9ISEFGOmh3anpiZHFRODBI&dnc=1&yms=izkxzhrL53I&source=youtube&ratebypass=yes";
}
);
"length_seconds" = 3286;
"likes_num" = 7;
longform = 1;
playability = "PLAY_OK";
"player_type" = desktop;
"profile_url" = "/user/KapfenbergWebTV";
"public_name" = KapfenbergWebTV;
"thumbnail_for_watch" = "http://i.ytimg.com/vi/WWjNEyHrNsk/hqdefault.jpg?w=600&h=360&sigh=5t9yhLmY66cc2ZBb6gJyOaNOsRs";
"thumbnail_info" = "<null>";
"time_created_text" = "Feb 6, 2013";
title = "HiWay-TV Sendung 3 - 2013";
"user_image_url" = "//s.ytimg.com/yts/img/silhouette32-vflu0yzhs.png";
"view_count" = "1,593";
"watch_link" = "/watch?v=WWjNEyHrNsk";
}
With different Qualities.
But if my video duration is over 1 hour, I only get small Quality like:
{
"comment_count" = 0;
description = "";
"dislikes_num" = 0;
duration = "1:00:47";
"encrypted_id" = taiK0WKSApg;
"fmt_stream_map" = (
{
"fallback_host" = "tc.v1.cache6.c.youtube.com";
itag = 36;
quality = small;
type = "video/3gpp; codecs=\"mp4v.20.3, mp4a.40.2\"";
url = "http://r6---sn-bvvbax-8pxe.c.youtube.com/videoplayback?ratebypass=yes&fexp=906370%2C923120%2C932000%2C932004%2C906383%2C916911%2C916910%2C902000%2C901208%2C919512%2C929903%2C925714%2C931202%2C900821%2C900823%2C931203%2C906090%2C909419%2C908529%2C930807%2C919373%2C930803%2C906836%2C920201%2C929602%2C930101%2C930609%2C926403%2C900824&signature=9B83CFB7B240D7DA86E0ED4EC0DFFCFF4151D85B.81CBC92237B653BA3BF7E0E52A730B324EFD70A8&key=yt1&id=b5a88ad162920298&newshard=yes&mt=1366015334&sparams=cp%2Cid%2Cip%2Cipbits%2Citag%2Cratebypass%2Csource%2Cupn%2Cexpire&mv=m&ms=au&ip=85.127.44.131&el=watch&yms=izkxzhrL53I&itag=36&upn=j7RXkiXzhRI&source=youtube&cp=U0hVS1BOV19OUkNONV9ISEFHOm13anpiZHFROTBN&expire=1366039698&ipbits=8&sver=3&dnc=1&app=youtube_mobile";
}
);
"length_seconds" = 3647;
"likes_num" = 6;
longform = 1;
playability = "PLAY_OK";
"player_type" = desktop;
"profile_url" = "/user/KapfenbergWebTV";
"public_name" = KapfenbergWebTV;
"thumbnail_for_watch" = "http://i.ytimg.com/vi/taiK0WKSApg/hqdefault.jpg?w=600&h=360&sigh=6hxibWtgHUAnZzNL9bBYxIQRScU";
"thumbnail_info" = "<null>";
"time_created_text" = "Apr 3, 2013";
title = "HiWay-TV Sendung 07 2013";
"user_image_url" = "//s.ytimg.com/yts/img/silhouette32-vflu0yzhs.png";
"view_count" = 974;
"watch_link" = "/watch?v=taiK0WKSApg";
}
Does anyone know where the Problem is??
duration doesn't matter. that video supports multiple format and qualities. you need to choose one that is available.
i have piece of my code base on ITAG hope this could help.
function GetScreenTag(iTag: Byte): String;
begin
case iTag of
5: Result := 'Low Quality, 240p, FLV, 400x240';
17: Result := 'Low Quality, 144p, 3GP, 0x0';
18: Result := 'Medium Quality, 360p, MP4, 480x360';
22: Result := 'High Quality, 720p, MP4, 1280x720';
34: Result := 'Medium Quality, 360p, FLV, 640x360';
35: Result := 'Standard Definition, 480p, FLV, 854x480';
36: Result := 'Low Quality, 240p, 3GP, 0x0';
37: Result := 'Full High Quality, 1080p, MP4, 1920x1080';
38: Result := 'Original Definition, MP4, 4096x3072';
43: Result := 'Medium Quality, 360p, WebM, 640x360';
44: Result := 'Standard Definition, 480p, WebM, 854x480';
45: Result := 'High Quality, 720p, WebM, 1280x720';
46: Result := 'Full High Quality, 1080p, WebM, 1280x720';
82: Result := 'Medium Quality 3D, 360p, MP4, 640x360';
84: Result := 'High Quality 3D, 720p, MP4, 1280x720';
100: Result := 'Medium Quality 3D, 360p, WebM, 640x360';
102: Result := 'High Quality 3D, 720p, WebM, 1280x720';
else
Result := 'NA';
end;
end;
It doesn't depend on the duration, it depends on the available quality.
If the quality is available, then there's a problem in parsing the (url_encoded_fmt_stream_map) block.
You can check this block and compare its contents with your parsing results.
"url_encoded_fmt_stream_map": "..............."
Related
High impedance for output, and undefined output and input for replay buffer
I'm trying to make a 8 KB replay buffer in Verilog, and when setting up the test-bench and running it, I get undefined states for the output, a high impedance for the ready, and undefined output for the data, as well as an undefined sequence variable. I'm not exactly sure as to how to get the test-bench to display the correct results. I've tried assigning data for the sequence variable, but nothing seems to be working.
My waveform is like this (https://imgur.com/a/hNt1bXU). My reg variables are initialized, and I'm not sure what the issue is in order to get a proper output for the waveform.
Replay Buffer
`timescale 1ns / 1ps
module buffer_top(busy_n,clk,reset_n,ack_nak,seq,tim_out,ready,we,din,dout);
parameter ADDR_WID = 12;
parameter DATA_WID = 16;
parameter DEPTH = 4096; /*MUST be 2^(ADDR_WID)*/
input busy_n,clk,reset_n,tim_out,we;
input[1:0] ack_nak;
input[11:0] seq;
input[DATA_WID-1:0] din;
output ready;
output[DATA_WID-1:0] dout;
wire full,empty,rd,prg,wr,replay;
wire[ADDR_WID-1:0] rd_inc,w_addr,r_addr,replay_addr;
wire[DATA_WID-1:0] dcurrent;
fifoSM u0(clk,reset_n,busy_n,we,ack_nak,seq,tim_out,full,empty,dcurrent,r_addr,ready,rd,prg,wr,rd_inc,replay);
ram u1(clk,r_addr,w_addr,din,dout,wr,rd,dcurrent,replay_addr);
fifo u2(clk,reset_n,wr,rd,prg,replay,rd_inc,full,empty,w_addr,r_addr,replay_addr);
endmodule
FIFO State Machine
`timescale 1ns / 1ps
module fifoSM(clk, reset_n,busy_n,we,ack_nak,seq,tim_out,full,empty,dcurrent,outptr,wrptr,ready,rd,prg,wr,rd_inc,replay );
parameter ADDR_WID = 12;
parameter DATA_WID = 16;
parameter DEPTH = 4096;
input clk,reset_n,busy_n,we,tim_out,full,empty;
input [1:0] ack_nak;
input [DATA_WID-1:0] dcurrent;
input [11:0] seq;
input [12:0] outptr,wrptr;
output reg rd,prg,wr,ready,replay;
output reg[ADDR_WID-1:0] rd_inc;
reg seqFound;
reg [1:0] format,nakcount;
reg [12:0] calc_inc,lastread;
reg [10:0] count;
reg [4:0]state;
localparam idle=5'b00000, s1=5'b00001, s2=5'b00010, s3=5'b00011, s4=5'b00100, s5=5'b00101,s6=5'b00110, s7=5'b00111,
s8=5'b01000,s9=5'b01001,s10=5'b01010,s11=5'b01011,s12=5'b01100,s13=5'b01101,s14=5'b01110;
always#(posedge clk)
begin
if(!reset_n)begin
state <= idle;
nakcount <= 2'd0;
end
else begin
case(state)
idle: begin
if(busy_n && !empty && outptr !=wrptr) //read buffer if not empty and lane is open
state <= s3;
else if(ack_nak == 10 && !empty)begin //handle nak if not empty
if(nakcount == 2'b11) //if replay count full go to retrain state
state <= s14;//retrain state
else begin //else go to purge section then after to replay states
state <= s8; //purge state
nakcount <= nakcount + 1;
end
end
else if(ack_nak == 2'b01 && !empty)begin//handle ack if not empty
state <= s8; //go to purge section
nakcount <= 2'd0; //reset replay counter
end
else if(tim_out && !empty)begin //handle time out if not empty
if(nakcount == 2'b11)//if replay count full
state <= s14;//go to retrain section
else begin //else go to replay state
state <= 11;
nakcount <= nakcount + 1; //increment replay count
end
end
else if(we && !full) //write packet if not full and is we
state <= s1;
end
//write states (input)
s1: begin
state <= s2;
end
s2: begin
if(we)
state <= s2;
else
state <= idle;
end
//read states (output) output rd=1 to fifo
s3: begin
state <= s4;
count <= 0;
end
s4: begin
state <=s5;
count <= 1;
format = dcurrent[14:13];
if(format[0]==0)begin
calc_inc = 13'd8; //3dw including 1dw for lcrc
end
else
calc_inc = 13'd10;
end
s5: begin
count <= 2;
if(dcurrent[9:0] == 0)
calc_inc = calc_inc + (format[1] * 2048);
else
calc_inc = calc_inc + (format[1] * dcurrent[9:0]*2);
state <= s6;
end
s6: begin
count <= count + 1;
if(count < calc_inc)
state <= s6;
else
state <= idle;
end
//purge
s8: begin //let rd_ptr increment r_ptr until found or do this
if(dcurrent == {"0000",seq})begin
state <=s9;
seqFound <= 1;
end
else begin
seqFound <=0;
end
end
s9: begin //get format fields to get header length, output to fifo: prg = 1
state <=s10;
format = dcurrent[14:13];
if(format[0]==0)begin
calc_inc = 13'd8; //3dw including 1dw for lcrc
end
else
calc_inc = 13'd10;
end
s10: begin //get length fields to add to increment
if(dcurrent[9:0] == 0)
calc_inc = calc_inc + (format[1] * 2048);
else
calc_inc = calc_inc + (format[1] * dcurrent[9:0]*2);
if(seqFound)begin //if done purging
if(ack_nak==2'b01) //if ack go to idle
state <=idle;
else begin //if nak go to replay states
state <= s11;
end
end
else
state <= s8; //examine next seq num in buffer to compare with dllp seq num
end
//replay states
s11: begin //set up lastread before enter replay mode
state <= s12;
lastread <= outptr; //set lastread to outptr before outptr changes in replay
end
s12: begin //output replay = 1 to fifo
state <= s13; //outptr will go back to where r_addr is
end
s13: begin //output read = 1 to fifo and repeat until outptr retruns to where it was
if(outptr < lastread)
state <=s13; //repeat this state
else
state <= idle; //if outptr back to where was go back
end
s14: state<= s14; //link retrain
default: begin state <= idle; end
endcase
end
end
always#(state)
case(state)
idle: begin replay = 0; ready = 0; rd = 0; wr = 0; prg = 0;end
s1: begin ready = 1; wr = 1; end
s2: begin wr = 1; end
s4: begin rd = 1; end
s8: begin ready = 0; rd = 0; wr =0; prg = 1; rd_inc = 1; end
s9: begin rd_inc = 1; end
s10: begin rd_inc = calc_inc; end
s11: begin replay = 0; ready = 0; rd = 0; wr =0; prg = 0;end //setup lastread with outptr
s12: begin replay = 1; end
s13: begin replay = 0; rd = 1; end
s14: begin ready = 0; rd = 0; wr= 0; prg= 0; end
default: begin ready = 1; rd = 0; wr = 0; prg = 0; end
endcase
endmodule
RAM
`timescale 1ns / 1ps
module ram(clk, r_addr, w_addr, din, dout, wr, rd, dcurrent, replay_addr);
parameter ADDR_WID = 12;
parameter DATA_WID = 16;
parameter DEPTH = 4096;
input clk, wr, rd;
input [ADDR_WID-1:0] r_addr, w_addr, replay_addr;
input [DATA_WID-1:0] din;
output [DATA_WID-1:0] dout, dcurrent;
reg [DATA_WID-1:0] dataout;
reg [DATA_WID-1:0] mem [0:DEPTH-1];
assign dout = (rd && !wr) ? dataout: 16'hzzzz;
assign dcurrent = mem[replay_addr];
always#(posedge clk) begin
if(wr) mem[w_addr] = din;
end
always#(posedge clk) begin
dataout = mem[r_addr];
end
endmodule
FIFO
module fifo(clk,reset_n,wr,rd,prg,replay,rd_inc,full,empty,w_addr,r_addr,replay_addr);
parameter ADDR_WID = 12;
parameter DATA_WID = 16;
parameter DEPTH = 4096;
input clk, reset_n, wr, rd, prg, replay;
input [ADDR_WID-1:0] rd_inc;
output full, empty;
output [ADDR_WID-1:0] w_addr, r_addr, replay_addr;
reg [ADDR_WID-1:0] w_ptr, replay_ptr, r_ptr;
always#(posedge clk)
begin
if(!reset_n)
begin
w_ptr <= 0;
replay_ptr <= 0;
r_ptr <= 0;
end
else
if(wr && !full)
w_ptr <= w_ptr + 1;
if(prg && !empty)begin
replay_ptr <= replay_ptr + rd_inc; //or long way and check every address for seq num
end
if(rd && !empty)
r_ptr <= r_ptr + 1;
if(replay)
r_ptr <= replay_ptr;
end
assign full = ((r_ptr!=w_ptr) && (r_ptr[ADDR_WID-1:0]==w_ptr[ADDR_WID-1:0]))?1:0;
assign empty = (r_ptr==w_ptr) ? 1 : 0;
assign w_addr = w_ptr[ADDR_WID-1:0];
assign out_addr = r_ptr[ADDR_WID-1:0];
assign replay_addr = replay_ptr[ADDR_WID-1:0];
endmodule
Replay Buffer Testbench
`timescale 1ns / 1ps
module buffer_top_tb();
parameter ADDR_WID = 12;
parameter DATA_WID = 16;
parameter DEPTH = 4096; /*MUST be 2^(ADDR_WID)*/
reg busy_n,clk,reset_n,tim_out,we;
reg[1:0] ack_nak;
reg[11:0] seq;
reg[DATA_WID-1:0] din;
wire ready;
wire[DATA_WID-1:0] dout;
buffer_top u3(busy_n,clk,reset_n,ack_nak,seq,tim_out,ready,we,din,dout);
always #2 clk = ~clk;
initial begin
clk = 0; reset_n = 0; busy_n = 0; ack_nak = 2'b00; tim_out = 0; we = 0; //initial state, everything zeroed out
#3;
reset_n = 1;
/*Writing packets to buffer*/
we = 1;
//Memory Read Request to read DW at address 3F6BFC11C and return result to entity with ID 0x0000
din = 16'h01a4; seq = 0; //seq# 420
#4; din = 16'h0000; #4; din = 16'h0001; //DW0
#4; din = 16'h0000; #4; din = 16'h0c0f; //DW1
#4; din = 16'hfdaf; #4; din = 16'hf047; //DW2
#4; din = 16'h0f0f; #4; din = 16'hf0f0; //LCRC
#4;
//Completion TLP w data 0xba5eba11
din = 16'h01a5; seq = 1; //seq# 421
#4; din = 16'h4A00; #4; din = 16'h0001;
#4; din = 16'h0100; #4; din = 16'h0004;
#4; din = 16'h0000; #4; din = 16'h0C40;
#4; din = 16'hba5e; #4; din = 16'hba11;
#4; din = 16'h0F0F; #4; din = 16'hf0f0;
#4;
//Memory Write Request 4DW + 1DW data
din = 16'h01a6; seq = 2; //seq# 422
#4; din = 16'h6000; #4; din = 16'h0001;
#4; din = 16'h0000; #4; din = 16'h000F;
#4; din = 16'hFDAF; #4; din = 16'hF040;
#4; din = 16'hFCBA; #4; din = 16'h57ED;
#4; din = 16'h9ABC; #4; din = 16'hDEF1;
#4; din = 16'h0F0F; #4; din = 16'hf0f0;
#4;
//Memory Write Request 3DW + 1DW data
din = 16'h01a7; seq = 3; //seq# 423
#4; din = 16'h4000; #4; din = 16'h0001;
#4; din = 16'h0000; #4; din = 16'h000F;
#4; din = 16'hFDAF; #4; din = 16'hF040;
#4; din = 16'h9ABC; #4; din = 16'hDEF1;
#4; din = 16'h0F0F; #4; din = 16'hf0f0;
#4;
//IO Rd request 3DW no Data
din = 16'h01a8; seq = 4; //seq# 424
#4; din = 16'h0200; #4; din = 16'h0001;
#4; din = 16'h0000; #4; din = 16'h000F;
#4; din = 16'hFDAF; #4; din = 16'hF040;
#4; din = 16'h0F0F; #4; din = 16'hf0f0;
#4;
/*End write phase*/
#20;
$stop;
end
endmodule
When I compile your code, I get several warnings. This is the 1st: fifoSM u0(clk,reset_n,busy_n,we,ack_nak,seq,tim_out,full,empty,dcurrent,r_addr,ready,rd,prg,wr,rd_inc,replay); | xmelab: *W,CUVWSP 1 output port was not connected: xmelab: replay This points to a connection error in your design. When you compare the fifoSM module instance line to the module declaration line, you will see that the ready signal is not connected properly. It is connected to wrptr instead of ready. This causes the high impedance (z) on ready at the top level. If you fix these connection problems, perhaps your other errors will be fixed as well. If you didn't get compile warnings with your simulator, try your code on multiple simulators on edaplayground. In order to avoid common connection problems like this, it is better to use connection-by-name instead of connection-by-position. Refer to IEEE Std 1800-2017, section 23.3.2.2 Connecting module instance ports by name. For example, to instantiate the fifoSM module, use something like this: fifoSM dut ( // Inputs: .ack_nak (ack_nak), .busy_n (busy_n), .clk (clk), .dcurrent (dcurrent), .empty (empty), .full (full), .outptr (outptr), .reset_n (reset_n), .seq (seq), .tim_out (tim_out), .we (we), .wrptr (wrptr), // Outputs: .prg (prg), .rd (rd), .rd_inc (rd_inc), .ready (ready), .replay (replay), .wr (wr) );
mp4 parsing for playback
I was asked to create a video player from scratch, so I think I'm missing some parts of the whole story. For an mp4 file containing this information, what boxes should I be concerned about in order to play the streams within the file. I know I should follow the standard and so on, but what I did is that I messed up the file a little bit. I transmuxed the video/audio streams like this: h264 -> mjpeg || AAC -> mp3 For the sake of simpler decoding "since I'm writing everything from scratch" this is the info about the video track in the mp4 file I'm trying to support: [trak] size=8+7753 [tkhd] size=12+80, flags=3 enabled = 1 id = 1 duration = 30034 width = 640.000000 height = 360.000000 [edts] size=8+28 [elst] size=12+16 entry_count = 1 entry/segment duration = 30034 entry/media time = 0 entry/media rate = 1 [mdia] size=8+7617 [mdhd] size=12+20 timescale = 15360 duration = 461312 duration(ms) = 30033 language = und [hdlr] size=12+33 handler_type = vide handler_name = VideoHandler [minf] size=8+7532 [vmhd] size=12+8, flags=1 graphics_mode = 0 op_color = 0000,0000,0000 [dinf] size=8+28 [dref] size=12+16 [url ] size=12+0, flags=1 location = [local to file] [stbl] size=8+7468 [stsd] size=12+160 entry_count = 1 [mp4v] size=8+148 data_reference_index = 1 width = 640 height = 360 compressor = [esds] size=12+32 [ESDescriptor] size=5+27 es_id = 1 stream_priority = 0 [DecoderConfig] size=5+13 stream_type = 4 object_type = 108 up_stream = 0 buffer_size = 0 max_bitrate = 861041 avg_bitrate = 861041 [Descriptor:06] size=5+1 [fiel] size=8+2 [pasp] size=8+8 [stts] size=12+12 entry_count = 1 [stsc] size=12+16 entry_count = 1 [stsz] size=12+3612 sample_size = 0 sample_count = 901 [stco] size=12+3608 entry_count = 901
what boxes should i be concerned about in order to play the streams within the file Every box is necessary.
Translate VHDL to Verilog
I have a problem with translating VHDL to Verilog. It's part of my source code on VHDL. With I/O I somehow understood, but have some problems to translate this string ib1 <= std_logic_vector(to_unsigned(i,ib1'length)); to verilog? COMPONENT GenerateModel PORT( ib1 : IN std_logic_vector(3 downto 0); ); END COMPONENT; --Inputs signal ib1 : std_logic_vector(3 downto 0) := (others => '0'); BEGIN uut: GenerateModel PORT MAP ( ib1 => ib1, ); process begin for i in 0 to 15 loop ib1 <= std_logic_vector(to_unsigned(i,ib1'length)); wait for 10 ns; end loop; end process; end;
To extend into Verilog from Paebbels' comment, the line you are looking at does an explicit conversion from the type of the loop variable i to the port variable ib1. In Verilog, that explicit conversion is not needed, you can just assign the port variable directly. So, for example (in Verilog IEEE 1364-1995 compatible): integer i; ... for (i = 0; i < 16; i = i + 1) begin ib1 = i; // <-- The line #10; // -- Assume 1 step is 1 ns, can specific timescale if needed end If you want, you can even loop through the variable directly if its of type reg (ie, not a net): for (ib1 = 0; ib1 < 15; ib1 = ib1 + 1) begin #10; end #10; [Note that as Greg mentioned, you need to be sure you dont create an infinite loop as if ib1 is 4-bits wide, it will always be less than 16, thus I fixed the example above to loop until ib1 is 15 (4'b1111)]
Delphi: en/decode for some function
this is a decode function for hexadecimal value, I tried to figure out the encode function for it, but no luck. function dtwin(flg: Integer): Integer; var i:integer; ner,yrd, yrv :Cardinal; unr :Int64; begin ner := 1; unr := flg; yrd := $2E8CFFB0; yrv := $0C8CFFF0; for i := 1 to 32 do begin if (yrv and 1) <> 0 then begin ner := ((ner * unr) mod (yrd)); end; unr := ((unr * unr) mod (yrd)); yrv := (yrv shr 1) and $7FFFFFFF; end; Result := ner; end;
The short answer is: It can't be done. Please read: http://en.wikipedia.org/wiki/Modular_exponentiation Let b = flg Let e = $0C8CFFF0 = 210567152 Let m = $2E8CFFB0 = 780992432 Then this function is calculating ( b ^ e ) mod m To reverse it, we need to find the multiplicative inverse of e mod m. I tried using WolframAlpha. http://www.wolframalpha.com/input/?i=multiplicative+inverse+of+210567152+mod+780992432 The result it gives is: (210567152 is not invertible modulo 780992432) The reason is that e and m are not co-prime. They are both divisible by two. From this we can conclude that there is no way to reverse this function because there are colissions. As an example: dtwin(60) = dtwin(2326) = 62188800 What should the reverse function return when called with the parameter 62188800? Should it return 60 or 2326? Here are some more examples of collisions: dtwin(658) = dtwin(1300) = 682595280 dtwin(60) = dtwin(2326) = 62188800 dtwin(1316) = dtwin(2600) = 76519712 dtwin(2312) = dtwin(3522) = 317601904 dtwin(1974) = dtwin(3900) = 52357088 dtwin(120) = dtwin(4652) = 144155936 dtwin(2632) = dtwin(5200) = 679101872 dtwin(3290) = dtwin(6500) = 322955216 dtwin(3989) = dtwin(6725) = 301338273 dtwin(180) = dtwin(6978) = 628048624 dtwin(4624) = dtwin(7044) = 435300992 dtwin(5080) = dtwin(7658) = 2152880 dtwin(3948) = dtwin(7800) = 682904608 dtwin(2685) = dtwin(8183) = 461799889 dtwin(2461) = dtwin(8951) = 170465 dtwin(4606) = dtwin(9100) = 138445536 dtwin(240) = dtwin(9304) = 231258592 dtwin(4741) = dtwin(9603) = 586985553 dtwin(6117) = dtwin(9923) = 277591073 To generate results that could be useful for encryption, you can generate numbers as follows. I won't go into details here about how this works. You can Google public key cryptography if you need to know more. Select P and Q that are prime. Compute N = P * Q Compute T = (P-1) * (Q-1) This is called the totient. Select E that is coprime to N and T. Select D that is the multiplicative inverse of E mod T. Your modulus is N. The two exponents are E and D. To encrypt A, calculate B = ( A ^ E ) mod N To decrypt B, calculate A = ( B ^ D ) mod N Note that in real-world encryption, these values typically have hundreds or thousands of digits. Here are some results that are in the order of magnitude of your examples: N = 590108483 =$232C5743 E = 547145911 =$209CC8B7 D = 507147559 =$1E3A7527 N = 763464677 =$2D818BE5 E = 545809367 =$208863D7 D = 622691303 =$251D83E7 N = 948703211 =$388C0FEB E = 885205759 =$34C32AFF D = 893844127 =$3546FA9F N = 897918037 =$35852455 E = 894567871 =$355205BF D = 539129719 =$20227777 N = 754905647 =$2CFEF22F E = 540902531 =$203D8483 D = 534729131 =$1FDF51AB
How to get number webcams, with using OpenCV
I get number webcams with using this code: CountCamers := 0; j := 0; capture := cvCreateCameraCapture(700); while Assigned(capture) do begin inc(CountCamers); cvReleaseCapture(#capture); capture := nil; inc(j); capture := cvCreateCameraCapture(700 + j); end; But, sometimes this code give at result number webcams equal 100 (max number camera of domain), but in reality only one webcam is connected. How to get number webcams? Thanks in advance.
When there is only 1 camera, the index is unused (you can pass -1). Try instead to check the identity of the opaque struct pointer returned. I think (sorry, not tested because I have just 1 camera attached) that should be unique for each device.
You can to get number of webcams checking if you can to get a Frame. Example in python: def get_num_cameras(): n = 0 num_cameras = 0 while n < 100: camera = CaptureFromCAM(n) if QueryFrame(camera): num_cameras += 1 n += 1 return num_cameras