I have 2 types of ARDUINO-cards. ATMEGA 2560 and ATMEGA 328P.
In my Delphi7 (XP64 sp2) I have modified the JvHidDeviceController Unit to show the PID/VID's of the abovementioned Cards. That works perfectly. And with the use of the TComPort unit I can communicate with the selected card. No problems here.
And here is the problem:
I connect my AVR MARK II (usb-tiny). System "says" OK.
(When I run the ARUINO program I have no problems communicating with the connected card.)
I run the Delphi program (JVHidDeviceController Unit), the 2560 and 328p PID/VID appear in a LIST-box but NOT the AVR-MARK II.
I Wonder why ? Please help.
After a search on the WWW I discovered, that the UNO (328P) could be turned into a ISP programmer. And by doing so I solve 2 (sub-)problems. I got the code ("bootloader") and the UNO Stills responds to the JVHidDeviceController requests. (Final solution in reach.. ) Kris
I am working on new costume board based on (i. MX 6Solo6DualLite).and I use (TJA1100 100BASE-T1 PHY) for Automotive Ethernet..
please correct me if my questions don't make sense, or I am in the wrong way.
I want to write driver for this device.. and make sure that it works correctly.
1- I can make sure that the driver works properly in the U-boot step, Right? I mean no need to load Linux kernel, so I have just to add source code C driver in U-boot source code and compile it. I want to do this in U-boot step, so I can limit the numbers of files that initialise all peripheriques, and make it simple as possible since that U-boot can behave like (mini-Os)
2-I don't know how to write this driver (exactly..), so I am looking for the driver (source code) that initialise the Ethernet Controller in any other processor , and initialise another typeof ethernet phy, in order to get an idea and write a similar driver source code for I.MX6 and TJA1100,?
after this i think that i could maybe add some very basic file c For simple Protocol like ARP, for test purpose..
3- is this good idea writing driver code by inspiring from another driver code source?
4 - maybe, if you already have a driver for (i. MX 6Solo6DualLite and TJA1100 100BASE-T1 PHY) can you provide to me please... ?
for my second question i tried to extract from U-boot source code the C file that initialise Ethernet Controller in AM335x, and initialise LAN8710A phy,(in beaglebone black) in order to get an idea and write a similar driver source code but i couldn't found it .. i found network C file for protocol .... but that's disturp me i couldn't seperate them from the real C file that initialise ethernet controller and ethernent Phy .
http://www.denx.de/wiki/U-Boot/SourceCode
There is a driver published on the NXP forum:
https://community.nxp.com/thread/460767
It includes both some bare metal code that should be usable with U-Boot and a Linux driver.
I have an example design in system generator for image processing which has one input image and one output image.
I would like to send data through AXI stream interface and export it as an IP core to Vivado IP integrator and develop the design further using DMA and software in SDK.
Firstly is it possible to have AXI stream interface in my design? If yes, how can I implement it? Can anybody help me?
Thanks in advance.
(i have attached image of the example here)
Image_filter
Firstly is it possible to have AXI stream interface in my design?
Yes, it is.
If yes, how can I implement it? Can anybody help me?
I have a similar project develop in Vivado 2015.3: an image filter (created with "High Level Synthesis") and this design block:
The High Level Synthesis code should look like:
#include "top.h"
void hls_sobel(
hls::stream< ap_axiu<8,1,1,1> > &video_in,
hls::stream< ap_axiu<8,1,1,1> > &video_out
)
{
ap_uint<16> Image_w=IMAGE_W_MAX;
ap_uint<16> Image_h=IMAGE_H_MAX;
// Create AXI streaming interfaces for the core
#pragma HLS INTERFACE axis port=video_in bundle=video_in
#pragma HLS INTERFACE axis port=video_out bundle=video_out
// No control interface - auto-start as soon as there's an input frame
#pragma HLS INTERFACE ap_ctrl_none port=return // no handshakes
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_8UC1> mat_in(Image_h, Image_w);
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_8UC1> mat_out(Image_h, Image_w);
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_8UC1> inx(Image_h, Image_w);
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_8UC1> iny(Image_h, Image_w);
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_16SC1> sobelx(Image_h, Image_w);
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_16SC1> sobely(Image_h, Image_w);
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_16SC1> zerox(Image_h, Image_w);
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_16SC1> zeroy(Image_h, Image_w);
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_8UC1> absx(Image_h, Image_w);
hls::Mat<IMAGE_H_MAX, IMAGE_W_MAX, HLS_8UC1> absy(Image_h, Image_w);
#pragma HLS dataflow
// read input and convert from axi-stream to Mat
hls::AXIvideo2Mat(video_in, mat_in);
// calculate Sobel in X and Y directions
hls::Duplicate(mat_in, inx, iny);
hls::Sobel<1,0,3>(inx, sobelx);
hls::Sobel<0,1,3>(iny, sobely);
// calculate abs of said Sobel
hls::Zero(zerox);
hls::Zero(zeroy);
hls::AbsDiff(sobelx, zerox, absx);
hls::AbsDiff(sobely, zeroy, absy);
// add both abs
hls::AddWeighted(absx, 1, absy, 1, 0, mat_out);
// write output
hls::Mat2AXIvideo(mat_out, video_out);
}
As you can note, a DMA is used. For the Video-Image application, I recommend using a Video-DMA (VDMA) to send all the pixel information via streaming-interface. After, in the SDK, it is easy to manage the transfer using the function in the Board Support Package (BSP).
Also, you can note that in the code above is explicitly specified hls::stream< ap_axiu<8,1,1,1> > &video_in,! In this way, I am creating a streaming interface.
Here you can find a tutorial about HLS image processing filter. In the last page, there are useful links. Follow them to realize the same system of the example.
I hope this can help
I am currently working on a very similar project, (I am not using System Generator though), so I bet I could give you some pointers. As far as I remember SysGen can produce some VHDL or Verilog code of your design. So:
After you get the HDL code of your design, pack it as a new IP in Vivado. There are plenty of tutorials on how to do this, it should be easy with a little search. You should wisely choose the interfaces you want to implement. You're going to definitely need an AXI Stream Slave interface for accepting the incoming data and an AXI Stream Master interface to transmit the results.
After you package your IP, you can begin building your system block-by-block (there are also some good tutorials on this, see end of answer). You will need to use the AXI DMA IP (or the Video DMA, depending on your needs) and you'll have to configure it properly, like choosing register-mode or scatter-gather, channels, etc.
Be extremely careful to generate the proper AXI synchronization signals correctly, as they can totally ruin your design (and nerves). It's easy but it requires some study of the AXI documentation provided by Xilinx (ARM's docs are too complicated for my taste).
Finally, you will definitely find very useful information on the following resources:
Xilinx Forum
FPGAdeveloper's example
another AXI-stream based design example
FPGA note wiki
AXI DMA Product Guide
Channel of Dr. Sadri of TU Kaiserslautern, really helpful to deeply understand AXI design concepts
Good luck!
PS: Simulators are your friends! Never try implementing your freshly written code directly onto the system design. Modelsim can save you significant time and effort which would otherwise be spent on pointless debugging.
If I understand correctly, you want to know how to create an AXI Stream interface inside your system generator design.
Yes it is possible to do it. You should have atleast two inputs in your design with names, for example, image_tdata and image_tvalid (gateway in). When you generate IP core, sysgen will recoginize this as an AXI STREAM. The format is important. It must be "$customname_tdata" and "$customname_tvalid". You can add other inputs as well to add to the AXI STREAM such as "$customname_tlast", "$customname_tready".
I am porting a C# program to Linux (using Mono). The only compatibility issues that MoMA has found were all related to printing: P/Invokes of functions from winspool.drv:
ClosePrinter
EndDocPrinter
EndPagePrinter
OpenPrinter
StartDocPrinter
StartPagePrinter
WritePrinter
These are all used in the same class, which prints files (which must be either PDF or PS) by wrapping them in PJL (to set the paper size/tray/orientation) and calling WritePrinter.
I'll need to rewrite this printing logic with non-Windows-specific code. A previous question refers to System.Drawing.Printing, but it seems to be way too low level. I don't want DrawString and DrawImage, I want "print this PostScript file". Is there functionality in Mono to do this?
I ended up using System.Diagnostics.Process to call the lp command.
I'm quite familiar with PHP dockblocks since it's been my job for the last 15+ years.
/**
* Description
*
* #tag bla bla
* #tag more bla bla
*/
What I'm trying to understand is if there is a standard like that for Delphi and/or FreePascal.
From my analysis on an awful lot of code I never seen any, but I could be dead wrong.
Delphi documentation tools
Using the XMLDoc tool for API documentation and HelpInsight with Delphi 2005
http://edn.embarcadero.com/article/32770
XML Documentation in Delphi 2006
http://tondrej.blogspot.com/2006/03/xml-documentation-in-delphi-2006.html
DelphiCodeToDoc
http://dephicodetodoc.sourceforge.net/
Doc-O-Matic
http://www.doc-o-matic.com/examplesourcecode.html
PasDoc
http://pasdoc.sipsolutions.net/
Pascal Browser
http://www.peganza.com/
Doxygen
http://www.doxygen.nl/
Pas2Dox
http://sourceforge.net/projects/pas2dox/
JADD - Just Another DelphiDoc
http://delphidoc.sourceforge.net/
Stackoverflow discussion
Is there a Delphi code documentor that supports current Delphi syntax?
https://stackoverflow.com/questions/673248/is-there-a-delphi-code-documentor-that-supports-current-delphi-syntax
Code documentation for delphi similar to javadoc or c# xml doc
Code documentation for delphi similar to javadoc or c# xml doc
Documenting Delphi
https://stackoverflow.com/questions/33336/documenting-delphi
Latest Delphis support parsing of XML documentation. They also use this information in hints (for example if you move the mouse cursor over a method name).
I'm using this template for method documentation:
///<summary></summary>
///<param name=''></param>
///<returns></returns>
///<exception cref=""></exception>
///<since>2009-04-15</since>
I prefer docs outside of the source (it always gets messy), and use the excellent fpdoc that comes with FPC. (FPC's own docs are written in it).
On a project I'm currently working on, we're using DelphiCodeToDoc, which works reasonably well. Its syntax looks like this:
type
{* This is an example class }
TMyClass = class
private
protected
public
{* Does some twiddling with AParam, and returns the result as String
#param AParam Input value
#return AParam incremented by 2, as String
#throws Exception 'Boo' if it's full moon }
function MyFunction(AParam: Integer): String;
end;
It looks like doxygen has a tool which can be used in conjunction to document Pascal and Delphi code. Maybe that will help you.
There are several standards, usually depending on the documentation tool being used. We use PasDoc, so we adhere mostly to its format http://pasdoc.sipsolutions.net/ which is based on JavaDoc.
Alternatively, there is XMLDoc as gabr pointed out and there are quite a few other tools, most having similar syntax with subtle differences.