I am looking for help with the following homework question:
It is assumed that a program has a virtual space of 1200 words. Consider the following series of virtual addresses:
60; 222; 160; 910; 450; 345; 412; 10; 180; 20; 443; 766; 812.
Give the sequence of the referenced page numbers, assuming that each page has 200 words.
How does the total virtual space relate to the 200 word pages? Does this mean the memory has 6 pages? How do I determine the page number from the virtual address?
Just looking for help to understand the steps, not a full solution thanks! I have looked through many examples and have had trouble seeing a repeatable formulaic way to do this. I have trouble understanding long text chunks and prefer mathematical formulas but available answers seem to have very wordy explanations.
I'm thinking virtual address #60 on page 1 because it is less than 200. Then after that, 222 would be on page 2 since ceiling(222/200) = 2.
Is that correct? Is ceiling(virtual address/page size) the right way to do it?
What do I make of the 1200? Would a virtual address of 1201 be invalid for a virtual space that size?
The formula is floor (virtual address / page size) for systems that use positional notation (start at zero) and ceiling (virtual address / page size) for systems that are 1-based (start at 1).
Related
I'm reading about virtual memory and I have some doubts reguarding multi-level paging.
I saw that in a N-level page table, the N-1 tables are used to store indexes to the next level tables.
This is my point:
Assuming the case of RISC-V Sv39 (Section 4.4 of RISC-V privileged architecture). We have the physical address of 1-level page root in SATP.ppn.
Virtual address is composed as follows:
<38-29> VPN[2] (9 bits)
<28-21> VPN[1] (9 bits)
<20-12> VPN[0] (9 bits)
<11-0> offset (12 bits)
After a TLB-miss, a page walk starts:
index_to_second_level_PT = SATP.PPN + VPN[2]
index_to_third_level_PT = index_to_second_level_PT + VPN[1]
physical_address = index_to_third_level + VPN[0]
My questions is:
Do all the idexes in the PTE (i.e, computed in step 1., 2., and 3.) are physical addresses? this makes sense to me, since once we get the physical address of the next table we can retrieve it from physical memory.
Moreover, always in RISC-V manual, also physical addresses and PTE entries are formatted with multiple fields (PPN[0], PPN[1], and PPN[2]). I understand that the virtual address is partitioned into three 9-bit fields to index the multi-level page table, but I don't understand why also the physical address is partitioned in such way.
Thanks in advance to anyone who responds.
This topic has been somewhat covered in other posts, but in my example I need to find more than what is shown on the other examples, and I struggle to clearly understand what exactly is going on.
Suppose I have the following system properties (and worked example I know the solutions to, but do not understand clearly):
And suppose I want to translate the virtual address 0x0712 to a physical address:
I would first convert 0x0712 to binary: 000011100010010 (knowing the VA is 15-bit wide)
I know the page size is 128 bytes, so log2(128) = 7, which is my offset bits.
I then need to answer the following:
What is the Virtual Page Number?
What is the TLB index?
What is the TLB tag?
Was it a TLB hit or miss?
Was there a Page fault?
What is the Physical Page Number?
How do I go about answering these? I know the VPN can be shown as E (or 0E), which makes sense as the 15-bit virtual address minus the offset bits (7) would leave: 00001110 = E. I also understand why there is no PPN, as there is no match for VPN 0E in the page table.
My guess would be the page fault is Y, exactly because there is no match to the VPN 0E in the page table? However, I come to this using just intuition.
But I dont understand the remaining parts, and how I answer these? Again I know the solutions as:
What is the Virtual Page Number? = 0E
What is the TLB index? = 2
What is the TLB tag? = 03
Was it a TLB hit or miss? = M
Was there a Page fault? = Y
What is the Physical Page Number? none
But I cant seem to grasp how they arrive at those answers from the worked example above. I've tried to read up on different posts in here, but I fail to spot anyone covering how to find the TLB index and tags properly, and in that case how to see whether is was a TLB hit/miss and if a Page fault happened.
Can anyone explain these concepts to me?
EDIT: I found the solution elsewhere, I posted it as a comment below to showcase the worked example.
My examining more examples toturials I stumbled upon a solution that made sense to me. In the case from above I have the following:
What is the Virtual Page Number?
Virtual address: 0x0712 which maps to binary address: 000011100010010
I know the offset bits are found by log2(128) = 7 bits which leaves the remaining 8-bits for the actual Virtual Address.
What is the TLB index?
As I have 4 sets in the TLB, I have 2 index bits (2^k = 4, for k = 2 which is the actual number of index bits needed to cover all 4 sets in the TLB-cache) and thus I can read the TLB index from the 2 least significant bits of the Virtual Address: 10 = 2.
What is the TLB tag?
The TLB tag, is the remaining 8-2 = 6-bits of the Virtual Address, in this case 000011 = 03.
Was it a TLB hit or miss?
To check if I have a TLB hit, I check the TLB table, lookup in set 2 (which was the TLB index) and see if there is a match to the tag 03 (which was the TLB tag). In this case I have no match, and thus there is a TLB MISS.
Was there a Page fault?
As the TLB-cache did not provide an answer, I need to lookup the translation from the Virtual Address using the page table instead. So I check the table for a VPN match of 0E, which there is not, and thus I have a Page Fault. In case I actually found a match, I would need to check the valid bit is 1, as it indicates if the data is loaded into the page table.
What is the Physical Page Number?
As there was no match in the TLB-cache translation, or the actual page table for the Virtual Address 0E, there is no PPN matching.
I have made some research about how this is being calculated and was unable to get a satisfiable answer.
I was trying to solve this " A computer with 512 kb of physical address and 32 kb pages.
1. How many entries are needed in the page table if traditional paging is used?
2. How many entries would have been needed if the pages were 16 kb?
I understand that the amount of amount of entries in the Table equals that of Pages in virtual address space.
but I could not figure out if I am wrong or not.
Answers would be appreciated.
As the title already says, I want to know what the range of the physical addresses of the associated segment is, if the CS register of a 8086 has the value 0xA000?
Shift left 4 bits.
0xa0000 + whatever value is hqving CS applied.
Since the cpu registers and other values are 16-bit, you get 0xAxxxx where xxxx is a 16 bit value. That is, the segment register specifies which 64k can be addressed. By windowing like that, you can get a 20-bit physical addresss space.
See this old post for more info. Once upon a time that was common teaching, but I suppose now it's harder to find. Maybe you can find some old books via Amazon Marketplace.
After a little research I found that this is the correct answer to the question:
0xA0000 + 0xFFFF = 0xAFFFF (highest physical address of the segment)
0xA0000 + 0x0000 = 0xA0000 (lowest physical address of the segment)
So the range of the physical addresses is 0xA0000 - 0xAFFFF.
I am trying to do some analysis with the logical address. The following program explains
my motive ...
#include<stdio.h>
int main()
{
int x=10;
printf("The address of main is %p\n",&main);
printf("The address of x is %p\n",&x);
return 0;
}
When I run this program in my 32bit system it shows
The address of main is 0x80483b4
The address of x is 0xbfe3b1e0
size page_size
text data bss dec hex filename
993 260 4 1257 4e9 page_size
getconf PAGESIZE
4096
I wish to relate the logical address to the page size..
I mean to say how this logical address creates (in terms of offset,page,data)
For this program size is 1257 bytes but i think whole page will get loaded (correct me if I am wrong) is there any way that I can be sure that whole page get loaded or only 1257bytes
get loaded.
I hope my question is clear in case any discrepancy please let me know. Thanks
You'd better learn more about how a binary program is loaded into operating system. Different sections in binary will be loaded into different pages.
Try read file /proc/[proc-id]/maps, you will get more ideas about such problem.
Also learn the ELF format helps too.
There are two things that you need to keep in mind. One is that you'll have the address of the instructions that make up your main and second you'll have your stack space that is needed for the running program. The address of main will be in the instruction space and the address of x is actually on the stack.