I have several questions regarding floating points and iOS devices:
Are floating points deterministic on one given iOS device?
Are floating points deterministic across all iOS devices?
If not, is there a way to make them deterministic? What I am thinking of is: change of compiler settings, usage of reduced set of math operations, etc.
If there isn't any way to do so, what would be the best alternative?
Could I use fixed points instead? Would it mean using NSDecimalNumber?
Cheers.
The results from the same data size should be identical. The IEEE standard for floating point dictates the results for different float operations on different sizes of floating point numbers.
Where you might get into trouble is if the definition of different data types varies across architectures.
The size of "float" is not formally defined in ANSI C. It can be 4 bytes on some platforms and 8 on others. (NSInteger, for example, is 32 bits on a 32 bit device and 64 bits on a 64 bit device. I know it's an integer type, but its an example of a type that changes size based on the platform.)
I don't know if Apple changed the size of any of the data types between their 32 bit and 64 bit platforms. Perhaps somebody who knows conclusively can chime in here.
The newest iOS devices are 64 bit. I would suggest checking the size of float/CGFloat (using sizeof().) If you don't have access to one of the new 64 bit devices you should be able to test it using the 64 bit simulator.
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I'm attempting to simulate a 32 bit computer under a very scuffed architecture I have come up with on my own. I am probably doing everything wrong but it's just a fun thing I'm doing to teach myself C.
I am encountering a slight issue where I have no idea how many bytes of a number I should save to memory.
At the moment I have an instruction that looks like this: CODE, (addressing info), add-a, add-b, add-c.
the opcode and addressing info is 4 bits long, and the addresses are 8 bits long. If I add 2 32 bit numbers (b and c) they get saved at address a. The issue arises when I have a number that is less than 32 bits. For example, if I have an array of 1 byte chars and for whatever reason I want to add 1 to one of the numbers, when I save the 1 byte char back to that array, it would be written as a 32 bit number, thus overwriting the 3 subsequent chars.
I'm not really sure the best way to tackle this issue but I have a few ideas.
Idea 1:
Just do everything in 32 bit chunks. Let the programmer deal with the issue themselves. (do some funky bitwise manipulation to fit the 1 byte char back into the array. maybe with a mask)
I don't want to do this as it would make the code messy.
Idea 2:
Only allow addresses every 32 bit . If every number is 32 bits long, then no number will be overwritten.
This sucks as as far I can tell, nothing does this. It would make saving smaller numbers take up 4 times more memory than they need to.
Idea 3:
Stop working with 32 bit numbers. Only ever add, subtract, store, get 8 bit numbers. This would work and probably be less messy but would also be very annoying. Adding 32 bit numbers would suddenly take at least 4 lines of code, the programs would then run slower. It would also mean moving lines of code around would also take at least 4 lines of code as each line of code is 4 bytes long.
Basically I have no idea what I'm doing and I can find anyone online talking about this. I'm sure either there is something glaringly obvious, or I'm doing something stupid and I will need to redesign the whole system...
also side note, I'm not sure if this is the correct place to ask this kind of question but if it isn't I would love to know where is
All the ideas you mention seem to share a common concept, which is to limit what the hardware does and make software make up the rest of its desires/requirements by (a) assembling larger items from smaller storage units, and vice versa, (b) packing smaller items into larger storage units.
Generally speaking this is how computation works anyway, providing only limited capabilities in hardware, and making software make up any shortfall. The limited capabilities, ideally, are well matched to common software patterns, such as for strings, integer of various sizes, floats, etc..
Where the line is drawn between hardware-built-in capabilities and software compensation has been changed many times by many processors over the years.
Software generally has to do both of these with any machine organization existing today. If you want an array of Boolean values, then you would probably want to pack them into bytes (or words) and set/extract bits from them, which is (b). On the other hand if you want long strings or multiword numeric data, then software assembles some larger number of storage units into a whole, which is (a).
Modern 64-bit hardware offers at least 1-byte, 2-byte, 4-byte and 8-byte data (modulo vectors). By offering these data sizes, we mean that it provides for instructions that directly operate on these sizes, i.e. single instructions that do useful things with them.
However, there are no modern bit-addressable machines, so if you want smaller than a byte (quite reasonable sometimes) you have to handle that with software.
Further if you want 3-, 5-, 6-, or 7-byte data, the hardware doesn't necessarily provide that directly — though support for misaligned load helps, since with that you can load a larger size and mask off the bad pieces; stores similar with read-modify-write.
If you want 9-byte or larger, you'll have to use multiple load and store instruction, though again misaligned capabilities in the hardware help with odd sizes.
Some instruction sets have drawn a limited line by removing byte load & store instructions (while remaining byte addressable) though provided dedicated instructions to extract the proper byte from a word in a register so as to still provide some hardware acceleration for byte operations on hardware that doesn't have misaligned loads, since without either byte loads, misaligned capabilities, or special helper instructions, extracting the proper byte from a word can take multiple instructions and/or repetitive loading of the same memory word for sequential access.
I advocate the load/store model. That means rich load & store instructions:, load signed byte, load unsigned byte, signed half, unsigned half, word (32), double. And arithmetic in such a model would be register to register, so then you don't need smaller than word-sized addition. No mainstream programming language demands byte addition, and having byte arithmetic doesn't even offer optimization in a load/store architecture.
However, you will want to take the architecture as a whole into account in designing the individual instructions.
In some cases it can be important to select the correct floating point type for your application, and it seems that on ios/osx you are pushed in the direction of using CGFloat.
CGFloat is meant to be the native floating point type, but I can't find a good summary of which device is 32bit or 64bit (and I would worry that the head-line designation might be for the integer unit or the address bus which might be different from the FP unit).
Furthermore, I assume all of the hardware supports double FP anyway, albeit at lower performance than the native 64 bit units.
Presumably, the O/S is irrelevant as this applies only to the use of the address space (but correct me if I am wrong).
Support for the 64bit architecture was introduced for the first time in Apple's A7 chip, which means that the first device to support 64bit was the iPhone 5S. The first iOS version to support it was iOS 7.
That said, I don't really understand why does it matter which device/OS is it. Your code should just handle 32bit/64bit properly. CGFloat is 4 bytes on 32bit systems and 8 bytes on 64bit systems, that's the only consideration.
I'm currently working on app that loads blob of tightly packed data which contains different integer types (sized from char to int) that might not be properly aligned.
So, can I use simple *(short*)ptr or similar accesses to that data? Test on my iphone 5 shows no problem with that, but I'm not sure about all cases on all newer processors.
I did find some related informations, like this:
ARMv6 and later, except some microcontroller versions, support unaligned accesses for half-word and single-word load/store instructions with some limitations, such as no guaranteed atomicity.
but in case of words it seems that on 32-bit and 64-bit ARMs word 32 and 64 bit accordingly, which would mean short requires proper alignment on 64-bit machine.
So, can I assume this is safe, or should I use some keywords like __packed?
Or should I rather avoid it completely and recreate my data so it always have proper alignment (or always use memmove when data is from external source and cannot by permanently modified)?
It's ages ago that I tried it. And it worked, but every single access to unaligned memory caused a trap, which took considerable time. I'd suggest you measure how long it takes to add a million aligned shorts vs a million unaligned shorts. If you have a few hundred or thousand unaligned numbers, nothing to worry about.
__packed works reasonably fast. ARM has some clever instructions to do unaligned access with very few instructions. Again, I'd measure how long that takes. My experience with this is not current.
What is the cache line size on iPhone and iPad?
And does it vary much between the different devices and CPUs?
This is not too easy to find with google.
I need to squeeze some extra performance from my app. :)
Well, the Cortex-A8 has 64-byte lines, Cortex-A9 has 32-byte lines, as for Swift and Cyclone I don't know - looking at comparable cores (A15, A57, Scorpion, Krait) 32 or 64 bytes seems likely. Either way there's at least 2 different lengths across iOS7 machines.
As you're performance-focused though, remember that benchmarking is infinitely more valuable than theorising - try as many reasonable combinations of code on every piece of hardware you can lay your hands on, go with what's fastest in practice regardless of what 'should' be best.
I'm working on a driver for reading smart cards (PC/SC), and I've been reading the data in a forced 8-bit manner, even if the card itself might have a 16-bit chip. I have two questions, one is: how would I tell whether the card conforms to a 16-bit or 8-bit architecture, and the other is: would there be a performance boost to treating the 16-bit system as 16-bit?
Would there be a performance boost to treating the 16-bit system as
16-bit?
No.
The CPU is internally 8, 16 or even 32 bit. But all current processor cards operate over either an ISO 7816-3 (contact) or ISO 14443 (contactless) interface. It's this interface that controls the speed, not the CPU. The CPU uses an outer clock for this, but all the latest smart cards use an internal clock that is running at much higher speeds.
As long as the interfaces are not updated, the "choice" between 8 or 16 bit doesn't matter a bit, let alone 8. I've put "choice" between quotes because I don't see where you have any choice in this.