I'm reading this book 3 easy pieces by remzi. In chapter 18 paging introduction in the first paragraph it is written
(real address spaces are much bigger, of course,
commonly 32 bits and thus 4-GB of address space, or even 64 bits)
Now if 1 byte is 8 bits, shouldn't 32 bits be 32/8 4 bytes space? I have seen the math for getting the answer as 4GB
2^10 = 1KB
2^10 = 1MB
2^10 = 1GB
But then this is assuming 2^1 = 1B, But isn't this simply wrong?
What am I missing? What does my answer (4Bytes) represent here?
This question is related How many bits are needed to address this much memory?
But doesn't address why my math is incorrect. (OP there also has the exact same confusion).
Lets say that I change the word size to 64MB (wild I know). Then number of words is 1. According to the answers, number of bits would be 2^0 = 1, 0 bits? Then where and when do we use the fact that 1 byte = 8 bits?
Any help would be appreciated.
Today, RAM is byte addressable. Each address put on the address bus returns 1 byte. If you have 32 bits, the amount of different addresses that you can come up with is 2^32 = 4,294,967,296. Since you can have that much different addresses, then you can address that much bytes. In terms of bytes, this amount of bytes is called 4 GB.
Im trying to learn about memory addressing (this is for Uni) and im unsure about the effect that a word addressable memory would have when i need to calculate number of address bits.
I will explain what (i think) I understand first.
To calculate the number of address bits I use : log2(n) where n is the number of bits of the memory.I.e for 1gb (1024mb * 1024 * 1024)= 1073741824 bits so therefore log2(1073741824 ) = 30 meaning a 1gb memory would require 30 address bits. I think im understanding that correctly.
The part im not sure about is byte addressable memory versus word addressable memory and how it might effect the number of address bits.
THE QUESTION:
Is it that the above example is correct ONLY for byte addressable and if for instance a memory was word addressable and using 16 bit or 32 bit words then the number of address bits required would be less (1/2 or 1/4 in the case of 16 and 32 bit words)??
My thinking is that if a cel holds 8 bits in a byte addressable machine then a cel in word addressable memory would hold 16bits or 32bits and therefore the address bits required should be less.
Further notes - I am aware that most memory nowadays is byte addressable and that word size in a computer is specific to the processor / bus , but the problems im working on do not mention and just ask about the effect byte /word addressable would have.
I have searched for other questions on this and not found one that answers it (or that i understand to answer it) . This for examplehttps://stackoverflow.com/questions/19528750/byte-word-addressable actually seems to be asking a similar thing but the OP seems to have posted the question incorrectly by specifying that the memory is 4M x 16 (instead of 4mb x 16bit) leading people to calculate the memory as 64mb.
First off, you need to be careful with you bits and bytes, the original example you have seems to deal with bits, each you really seem to want to know about bytes. It does matter when we are dealing with a bit addressable memory or a byte addressable memory. So, lets talk about things in terms of byte addressable or word addressable memory.
As stated, your analysis of how to get the number of bits needed to address a memory is correct; but it can be generalized. In order to get the minimum number of bits we need to fully address a memory, we need to know how many unit-size things we can address. In your case, you were calculating the number of addresses need to address a 1 Gb (giga-bit) memory. We can just as easily do it in bytes, in order to byte address a 1 GB (giga-byte) memory, you need to know the number of addressable things (bytes) there are and then take the log2 of it. So, number of things there are is easy to get, (1 GB has 1024^3 or 1 G bytes in it) so we just need to log2 that; log2(1 G) = log2(1024*1024*1024) = 3*log2(1024) = 3 * 10 = 30. So, we need 30 bits to fully address that space.
Now lets talk in words. First is knowing the word size. Word size is not strictly 32 or 16 bits, it can be a range of values, typically dependent on whatever the processor decides to call a word (or the spec that is). Lets deal in 32-bit words for our example.
Now that we have a word size, we need to know the memory size. Lets assume the same 1 GB from before, but now we are word addressing it (its a word addressable memory now and the word size is 32 bits or 4 bytes). So, just as before, we need to know the number of addressable things (now its words) that there are in the memory size. Well, this time it isnt 1 G, because our addressable thing is now 4 B in size instead of 1 B. So we need to take our 1 GB memory size and divide it by the word size (1 GB / 4 B = 0.25 G). Just as before, now that we have the number of addressable things (0.25 G), we just need to that the log2 of it; log2(0.25G) = log2 (256*1024*1024) = log2(256) + 2*log2(1024) = 8 + 2 * 10 = 28.
It all some down to the number of the addressable things (words, bytes, bits) in a given memory. As we typically give memory sizes in bytes, byte addressable calculations are easy, but the others just take a little manipulation to get something from a dimensional value (1 GB) into dimensionless value (1 G, ie 1024^3).
I'm reading a book about assembly; Jones and Bartlett Publishers Introduction to 80x86 Assembly
The author give exercises but no answers to it. Obviously before going further, I want
to make sure that I fully understand the chapter concepts.
donc,
What is the 8-hex-digit address of the "last" byte for a PC with 32 MBytes of RAM
This is my solution:
1) convert to bits
32 MBytes = 268435456 bits
2) I subtract 8 bits to remove the last byte
268435448
3) conversion to hexadecimal
FFFFFF8
So I got FFFFFF8
Does this look a good answer?
No. For assembly programming it's very helpful to be able to do simple power-of-2 calculations in your head. 1K is 2^10. So 1M is 2^20. So 32M is 2^25 (because 2^5 = 32). So the address of the last byte is 2^25-1 (because the first byte is at 0). This is 25 bits that are all 1's (because 2^n-1 is always n 1's). In hex, this is six F's (4 bits per F) plus an additional 1, so prepending a zero to get 8 hex digits, you have 01FFFFFF.
There are two things you should think about:
For most computers (all PCs) adresses are given in bytes, not in bits.
Therefore you must calculate: 32 MByte = 33554432 Bytes, minus 1 byte = 01FFFFFF (hex) as "Gene" wrote in his answer.
In reality (if you are interested in) you must also think about the fact that there is a "gap" in the address area (from 000A0000 to 000FFFFF) of real PCs so either not all the RAM is useable or the last address of the RAM comes later. This area is used for the graphics card and the BIOS ROM.
I thinking is : 00007FFF
because: 32MB = 32*1024 = 32768
byte last have address 32767 (7FFF)
The question is as follow :
A microcomputer has memory locations from 00000h to FFFFFh. Each memory
location stores 1 byte. In decimal, how many bytes can the microcomputer store in its
memory? How many Kilobytes is this?
Answer:
It requires two 2Kbytes of RAM and 512 bytes
of PROM.
I try to calculate myself before reviewing the answer,and find out that it is not same,till now i still don't understand why this is the answer,anyone may give me some help??Thanks
The answer is clearly the answer to another question and not this one.
Well, 00000h to FFFFFh, this represents 100,000h memory locations, hence 100,000h bytes. 10h^5 (hex) is 16^5 (decimal).
16^5 = (2^4)^5 = 2^20 = (1024)^2 = 1 M = 1024 K.
Conclusion: this processor can address one megabyte of memory.
Obviously, less than one megabyte is installed on this microcomputer, and not all of the installed memory is RAM. But you can't deduce this from the amount of addressable memory.
Just reading some notes in a purdue lecture about OSs, and it says:
A program sees memory as an array of
bytes that goes from address 0 to 2^32-1 (0 to
4GB-1)
Why 4 GB?
Because 32 bits are able to represent numbers up to 232 − 1 = 4294967295 = 4 GiB − 1 and therefore address up to 232 individual bytes which would be 4 GiB then.
There are ways to circumvent that, though. For example using PAE even a 32-bit operating system can support more memory. Historically this has most commonly been used on servers, though. Also, the non-server Windows SKUs don't support it. By now all that is moot, though, given that 64-bit CPUs, OSes and driver support are commonplace.
Because each byte of memory has to have an address. In a 32-bit operating system, an address is 32 bits long; thus, there are 2^32 possible addresses, which means there are 2^32 bytes = 4 GB.
If you have a 4-bit system, this means the address for each byte is 4 binary digits, the probability of all your address will range from 0000 through 1111 which is 2^4 = 16 (2 because there is either 0 or 1), with four bits it's possible to create 16 different values of zeros and ones, If you have 16 different addr. each represent a byte then you can have a max of 16 bytes
4-bit system will look like this:
For a 32-bit system, your max is 2^32 = 4294967292 bytes
Everybody is saying 2^32 = 4GiB, which is right. Just in case, here is how we got there:
A 32-bit machine uses 32 bits to address memory. Each bit has a value of 0 or 1. If you have 1 bit, you have two possible addresses: 0 or 1.
A two-bit system ( pun aside ) has four possible address: 00 =0, 01=1, 10=2, 11=3. 2^2=4.
Three bits have 8 possble addresses: 000=0, 001=1, 010=2, 011=3, 100=4, 101=5, 110=6, and 111=7.
Each bit doubles the potential address space, which is why 2^n tells you how many addresses you use for a given number of bits. 2^1 = 2, 2^2 = 2*2 = 4, 2^3 = 2*2*2 = 8, etc.
By the time you get to 32 bits, you are at 4GiB.
4 GB = 2^32 bytes.
2 ^ 32 = 4 * 1024 * 1024 * 1024
That, in bytes, is the definition of 4 GB. In other words a 32-bit register as a memory pointer can address 4 GB of memory and no more.
Actually, it's not as simple as 2^32 = 4294967296 bytes. You see in x86 protected mode, with paging enabled (that is, what you get when you use any modern OS), you don't address memory locations directly, even though the paging translation mechanism is transparent for client applications.
Of a logical 32 bit memory address, when using 4K pages:
bits 22-31 refer to a page directory
bits 12-21 refer to a page table
bits 11-0 refer to an offset in the 4096 byte page
As you can see, you have 2^10 (1024) page directories, in each page directory, you have 2^10 page tables and each page is 2^12 (4096) bytes long, hence 2^32 = 4294967296 bytes. The width of the memory bus is conveniently the same as the word length of the CPU but it's not necessary to be like this at all. In fact, more modern x86 CPUs support PAE which enables addressing more than 4GB (or GiB) even in 32-bit mode.
32bits can represent numbers 0..2^32 = 0..4,294,967,296
32bits can address up to 2^32Bytes (assuming Byte-size blocks)
2^32Bytes is the max size
2^32B = 4,194,304KiB = 4,194MiB = 4GiB
Because is the amount of different memory addresses (in Bytes) that can be stored in a Word.
But, in fact, that's not always true (in most of cases it isn't), the OS can handle more physical memory than that (with PAE) and the applications can use less than 4GB of virtual memory (because part of that virtual memory is mapped to the OS, 1GB in Linux and 2GB in Windows, for example).
Another scenario where that doesn't apply is if the memory was addressed by Words instead of Bytes, then the total memory addressable would be 16GB, for example.
A CPU with 32 bit registers will need the operating system to calculate everything in chunks of 32 bits. It's a hardware requirement to which the OS must conform. Similarly, CPUs with 64 bit registers will need an operating system that reads and writes data from the RAM in chunks of 64 bits. (Every time you read data from memory, you need to read it into one of those registers - be it 32 bit, or 64 bit, or 16 bit, etc.)
A 32 bit register can store 2^32 different RAM addresses.
Each RAM address corresponds to a byte (8 bits) in modern RAMs. (The 4 GB argument is true only for those RAMs that have addresses for every byte.)
=> 2^32 = 4,294,967,296 addresses, → that corresponds to 4,294,967,296 bytes.
Now, 1 KB = 2^10 bytes or 1024 bytes (in the binary system)
Therefore, 4,294,967,296 bytes / 1024 = 4,194,304 KB
4,194,304 KB / 1024 = 4,096 MB
4,096 MB / 1024 = 4 GB
Mainly due to 32bit OS chosing to support only 2^32-1 addresses.
If the CPU has more than 32 address lines on the FSB, then the 32bit OS can choose to use a paging mechanism to access more than 4GiB. (For example Windows 2000 Advanced Server/Data Center editions on PAE supported Intel/AMD chips)
4 GB = 2^32 bytes.
But remember its max 4gb allocated by a 32 bit OS. In reality, the OS will see less e.g. after VRAM allocation.
As previously stated by other users, 32-bit Windows OSes use 32-bit words to store memory addresses.
Actually, most 32-bit chips these days use 36-bit addressing, using Intel's Physical Address Extension (PAE) model. Some operating systems support this directly (Linux, for example).
As Raymond Chen points out, in Windows a 32-bit application can allocate more than 4GB of memory, and you don't need 64-bit Windows to do it. Or even PAE.
For that matter, 64-bit chips don't support the entire 64-bit memory space. I believe they are currently limited to 42-bit space... the 36-bit space that PAE uses, plus the top 8-bit addresses,